Bishnu Prasad Das

According to our database, Bishnu Prasad Das authored at least 35 papers between 2006 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

A Low Power Dual-Band Sub-Sampling Phase Locked Loop with sub-100 fs RMS Jitter and jitter.

Anshul Verma, Bishnu Prasad Das

Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2023

An Efficient Scaling-Free Folded Hyperbolic CORDIC Design Using a Novel Low-Complexity Power-of-2 Taylor Series Approximation.

Anu Verma, Khyati Kiyawat, Bishnu Prasad Das, Pramod Kumar Meher

IEEE Trans. Very Large Scale Integr. Syst., August, 2023

Ultra-Low Power Non-Uniform SAR ADC based ECG detector for Early Detection of Cardiovascular Diseases.

Aditya Ramkumar, Anshul Verma, Bishnu Prasad Das

Proceedings of the 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, 2023

Lightweight Approximate Multiplier with Improved Accuracy in FPGA for Error Resilient Application.

Apurba Prasad Padhy, Bishnu Prasad Das

Proceedings of the 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, 2023

Area-Efficient In-Memory Computation with Improved Linearity using Voltage-Controlled Delay Cell-based Ring Oscillator.

Amandeep Singh, Bishnu Prasad Das

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2023

2022

In-Memory Computation With Improved Linearity Using Adaptive Sparsity-Based Compact Thermometric Code.

Prasanna Kumar Saragada, Bishnu Prasad Das

IEEE Trans. Very Large Scale Integr. Syst., 2022

Low Power Dual-Band Current Reuse-based LC-Voltage Controlled Oscillator with Shared Inductor for IoT Applications.

Anshul Verma, Bishnu Prasad Das

Proceedings of the VLSI Design and Test - 26th International Symposium, 2022

Highly Non-linear Feed-Forward Arbiter PUF Against Machine Learning Attacks.

Aranya Gupta, Sanjeev Manhas, Bishnu Prasad Das

Proceedings of the VLSI Design and Test - 26th International Symposium, 2022

RISC-V Core with Approximate Multiplier for Error-Tolerant Applications.

Anu Verma, Priyamvada Sharma, Bishnu Prasad Das

Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

2019

An optimal device sizing for a performance-driven and area-efficient subthreshold cell library for IoT applications.

Priyamvada Sharma, Poorvi Jain, Bishnu Prasad Das

Microelectron. J., 2019

A True Single-Phase Error Masking Flip-Flop with Reduced Clock Power for Near-Threshold Designs.

Priyamvada Sharma, Bishnu Prasad Das

Proceedings of the VLSI Design and Test - 23rd International Symposium, 2019

Low Latency Scaling-Free Pipeline CORDIC Architecture Using Augmented Taylor Series.

Sumit Satyavijay Wadkar, Bishnu Prasad Das, Pramod Kumar Meher

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2019

An In-Memory Architecture for Machine Learning Classifier Using Logistic Regression.

Prasanna Kumar Saragada, Meghnath Rathod, Bishnu Prasad Das

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2019

2018

Low Overhead Warning Flip-Flop Based on Charge Sharing for Timing Slack Monitoring.

Govinda Sannena, Bishnu Prasad Das

IEEE Trans. Very Large Scale Integr. Syst., 2018

Metastability immune and area efficient error masking flip-flop for timing error resilient designs.

Govinda Sannena, Bishnu Prasad Das

Integr., 2018

2017

Within-Die Threshold Voltage Variability Estimation Using Reconfigurable Ring Oscillator.

Poorvi Jain, Bishnu Prasad Das

Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017

A 10T Subthreshold SRAM Cell with Minimal Bitline Switching for Ultra-Low Power Applications.

Swaati, Bishnu Prasad Das

Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

2016

Area and Power-Efficient Timing Error Predictor for Dynamic Voltage and Frequency Scaling Application.

Govinda Sannena, Bishnu Prasad Das

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2016

A Metastability Immune Timing Error Masking Flip-Flop for Dynamic Variation Tolerance.

Govinda Sannena, Bishnu Prasad Das

Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

2014

Frequency-Independent Warning Detection Sequential for Dynamic Voltage and Frequency Scaling in ASICs.

Bishnu Prasad Das, Hidetoshi Onodera

IEEE Trans. Very Large Scale Integr. Syst., 2014

On-Chip Measurement of Rise/Fall Gate Delay Using Reconfigurable Ring Oscillator.

Bishnu Prasad Das, Hidetoshi Onodera

IEEE Trans. Circuits Syst. II Express Briefs, 2014

Building trusted ICs using split fabrication.

Kaushik Vaidyanathan, Bishnu Prasad Das, Huseyin Ekin Sumbul, Renzhi Liu, Larry T. Pileggi

Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, 2014

Detecting Reliability Attacks during Split Fabrication using Test-only BEOL Stack.

Kaushik Vaidyanathan, Bishnu Prasad Das, Larry T. Pileggi

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013

Generating rules from data mining for collaboration moderator services.

Claire Palmer, Jennifer A. Harding, Rahul Swarnkar, Bishnu Prasad Das, Robert I. M. Young

J. Intell. Manuf., 2013

2012

A framework for collaboration moderator services to support knowledge based collaboration.

Rahul Swarnkar, Alok Kumar Choudhary, Jenny A. Harding, Bishnu Prasad Das, Robert I. M. Young

J. Intell. Manuf., 2012

Area-efficient reconfigurable-array-based oscillator for standard cell characterisation.

Bishnu Prasad Das, Hidetoshi Onodera

IET Circuits Devices Syst., 2012

Application of Collaboration Moderator Service in Pharmaceutical Industry: A Collaborative Drug Discovery Use Case.

Rahul Swarnkar, Jennifer A. Harding, Bishnu Prasad Das, Robert I. M. Young, Sri Krishna Kumar

Proceedings of the Enterprise Interoperability V, 2012

2010

Learning Collaboration Moderator Services: Supporting Knowledge Based Collaboration.

Alok Kumar Choudhary, Jenny A. Harding, Rahul Swarnkar, Bishnu Prasad Das, Robert I. M. Young

Proceedings of the Collaborative Networks for a Sustainable World, 2010

Warning Prediction Sequential for Transient Error Prevention.

Bishnu Prasad Das, Hidetoshi Onodera

Proceedings of the 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2010

2008

Voltage and Temperature Scalable Standard Cell Leakage Models Based on Stacks for Statistical Leakage Characterization.

Janakiraman Viraraghavan, Bishnu Prasad Das, Bharadwaj Amrutur

Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

Voltage and Temperature Scalable Gate Delay and Slew Models Including Intra-Gate Variations.

Bishnu Prasad Das, Janakiraman Viraraghavan, Bharadwaj Amrutur, H. S. Jamadagni, N. V. Arvind

Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

Within-die gate delay variability measurement using re-configurable ring oscillator.

Bishnu Prasad Das, Bharadwaj Amrutur, H. S. Jamadagni, N. V. Arvind, V. Visvanathan

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007

A review of approaches to supply chain communications: from manufacturing to construction.

Anne-Françoise Cutting-Decelle, Bob Young, Bishnu Prasad Das, Keith Case, Shahin Rahimifard, Chimay J. Anumba, Dino Bouchlaghem

J. Inf. Technol. Constr., 2007

Towards the understanding of the requirements of a communication language to support process interoperation in cross-disciplinary supply chains.

Bishnu Prasad Das, Anne-Françoise Cutting-Decelle, Robert I. M. Young, Keith Case, Shahin Rahimifard, Chimay J. Anumba, N. M. Bouchlaghem

Int. J. Comput. Integr. Manuf., 2007

2006

Building supply chain communication systems: a review of methods and techniques.

Anne-Françoise Cutting-Decelle, Bishnu Prasad Das, Robert I. M. Young, Keith Case, Shahin Rahimifard, Chimay J. Anumba, N. M. Bouchlaghem

Data Sci. J., 2006