Jörg Henkel

Daniel Mueller-Gritschneder

Ulf Schlichtmann

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Hardware-Aware Automated Neural Minimization for Printed Multilayer Perceptrons.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

The First Concept and Real-world Deployment of a GPU-based Thermal Covert Channel: Attack and Countermeasures.

[BibT_eX]

[DOI]

Jeferson González-Gómez

Kevin Cordero-Zuñiga

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Machine Learning-based Thermally-Safe Cache Contention Mitigation in Clustered Manycores.

[BibT_eX]

[DOI]

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Late Breaking Results: Configurable Ring Oscillators as a Side-Channel Countermeasure.

[BibT_eX]

[DOI]

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Smart Detection of Obfuscated Thermal Covert Channel Attacks in Many-core Processors.

[BibT_eX]

[DOI]

Jeferson González-Gómez

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Special Session - Non-Volatile Memories: Challenges and Opportunities for Embedded System Architectures with Focus on Machine Learning Applications.

[BibT_eX]

[DOI]

João Paulo C. de Lima

Proceedings of the International Conference on Compilers, 2023

2022

FN-CACTI: Advanced CACTI for FinFET and NC-FinFET Technologies.

[BibT_eX]

[DOI]

Divya Praneetha Ravipati

IEEE Trans. Very Large Scale Integr. Syst., 2022

TherMa-MiCs: Thermal-Aware Scheduling for Fault-Tolerant Mixed-Criticality Systems.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 2022

Power-Aware Checkpointing for Multicore Embedded Systems.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 2022

Introduction and Evaluation of Attachability for Mobile IoT Routing Protocols With Markov Chain Analysis.

[BibT_eX]

[DOI]

Hossein Taghizade

Ali Asghar Mohammadsalehi

Kimia Talaei Khoosani

Parham Sadeghi

IEEE Trans. Netw. Serv. Manag., 2022

Energy Efficient Edge Computing Enabled by Satisfaction Games and Approximate Computing.

[BibT_eX]

[DOI]

Nafis Irtija

Eirini-Eleni Tsiropoulou

IEEE Trans. Green Commun. Netw., 2022

Thermal-Aware Standby-Sparing Technique on Heterogeneous Real-Time Embedded Systems.

[BibT_eX]

[DOI]

IEEE Trans. Emerg. Top. Comput., 2022

Software-Managed Read and Write Wear-Leveling for Non-Volatile Main Memory.

[BibT_eX]

[DOI]

Georg von der Brüggen

ACM Trans. Embed. Comput. Syst., 2022

Towards a New Thermal Monitoring Based Framework for Embedded CPS Device Security.

[BibT_eX]

[DOI]

Naman Patel

IEEE Trans. Dependable Secur. Comput., 2022

Bridging the Gap Between Voltage Over-Scaling and Joint Hardware Accelerator-Algorithm Closed-Loop.

[BibT_eX]

[DOI]

Guilherme Paim

Eduardo Antônio César da Costa

IEEE Trans. Circuits Syst. Video Technol., 2022

Probability-Driven Evaluation of Lower-Part Approximation Adders.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2022

Variability-Aware Approximate Circuit Synthesis via Genetic Optimization.

[BibT_eX]

[DOI]

Konstantinos Balaskas

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Energy-Efficient DNN Inference on Approximate Accelerators Through Formal Property Exploration.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

MLCAD: A Survey of Research in Machine Learning for CAD Keynote Paper.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

CaPUF: Cascaded PUF Structure for Machine Learning Resiliency.

[BibT_eX]

[DOI]

Hassan Nassar

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Thermal-Aware Design for Approximate DNN Accelerators.

[BibT_eX]

[DOI]

Sami Salamin

Isai Roman-Ballesteros

IEEE Trans. Computers, 2022

FeFET-Based Binarized Neural Networks Under Temperature-Dependent Bit Errors.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2022

Trojan Detection in Embedded Systems With FinFET Technology.

[BibT_eX]

[DOI]

Virinchi Roy Surabhi

Eduardo Antônio César da Costa

IEEE Trans. Computers, 2022

Impact of NCFET Technology on Eliminating the Cooling Cost and Boosting the Efficiency of Google TPU.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2022

A Framework for Crossing Temperature-Induced Timing Errors Underlying Hardware Accelerators to the Algorithm and Application Layers.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2022

On the Reliability of FeFET On-Chip Memory.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2022

CoMeT: An Integrated Interval Thermal Simulation Toolchain for 2D, 2.5D, and 3D Processor-Memory Systems.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2022

An FPGA-based Approach to Evaluate Thermal and Resource Management Strategies of Many-core Processors.

[BibT_eX]

[DOI]

Marcel Mettler

Daniel Mueller-Gritschneder

Ali Asghar Mohammad Salehi

Ulf Schlichtmann

ACM Trans. Archit. Code Optim., 2022

ARMOR: A Reliable and Mobility-Aware RPL for Mobile Internet of Things Infrastructures.

[BibT_eX]

[DOI]

IEEE Internet Things J., 2022

Designing Autonomous Systems.

[BibT_eX]

[DOI]

IEEE Des. Test, 2022

Report on the Design Automation Conference (DAC 2021).

[BibT_eX]

[DOI]

IEEE Des. Test, 2022

Agent-based Constraint Solving for Resource Allocation in Manycore Systems.

[BibT_eX]

[DOI]

Volker Wenzel

CoRR, 2022

CoCo-FL: Communication- and Computation-Aware Federated Learning via Partial NN Freezing and Quantization.

[BibT_eX]

[DOI]

CoRR, 2022

A Survey of Fault-Tolerance Techniques for Embedded Systems From the Perspective of Power, Energy, and Thermal Issues.

[BibT_eX]

[DOI]

IEEE Access, 2022

Approximate Decision Trees For Machine Learning Classification on Tiny Printed Circuits.

[BibT_eX]

[DOI]

Konstantinos Balaskas

Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

Approximate Computing and the Efficient Machine Learning Expedition.

[BibT_eX]

[DOI]

Swagath Venkataramani

Xiaoxuan Yang

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Thermal- and Cache-Aware Resource Management based on ML- Driven Cache Contention Prediction.

[BibT_eX]

[DOI]

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

NPU-Accelerated Imitation Learning for Thermal- and QoS-Aware Optimization of Heterogeneous Multi-Cores.

[BibT_eX]

[DOI]

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

Cross-Layer Approximation For Printed Machine Learning Circuits.

[BibT_eX]

[DOI]

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

DISTREAL: Distributed Resource-Aware Learning in Heterogeneous Systems.

[BibT_eX]

[DOI]

Proceedings of the Thirty-Sixth AAAI Conference on Artificial Intelligence, 2022

Enabling Efficient Inference of Convolutional Neural Networks via Approximation.

[BibT_eX]

[DOI]

Proceedings of the Approximate Computing, 2022

2021

Automatic Floorplanning and Standalone Generation of Bitstream-Level IP Cores.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2021

Cross-Layer Approximate Hardware Synthesis for Runtime Configurable Accuracy.

[BibT_eX]

[DOI]

Andreas Gerstlauer

IEEE Trans. Very Large Scale Integr. Syst., 2021

AxLS: A Framework for Approximate Logic Synthesis Based on Netlist Transformations.

[BibT_eX]

[DOI]

Humberto Barrantes-García

Eduardo Antonio Cesar da Costa

IEEE Trans. Circuits Syst. II Express Briefs, 2021

PROTON: Post-Synthesis Ferroelectric Thickness Optimization for NCFET Circuits.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

On the Resiliency of NCFET Circuits Against Voltage Over-Scaling.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Automated Design Approximation to Overcome Circuit Aging.

[BibT_eX]

[DOI]

Konstantinos Balaskas

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Post-Silicon Heat-Source Identification and Machine-Learning-Based Thermal Modeling Using Infrared Thermal Imaging.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

Power-Efficient Heterogeneous Many-Core Design With NCFET Technology.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2021

Neural Network-Based Performance Prediction for Task Migration on S-NUCA Many-Cores.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2021

On-Demand Mobile CPU Cooling With Thin-Film Thermoelectric Array.

[BibT_eX]

[DOI]

IEEE Micro, 2021

Report on First and Second ACM/IEEE Workshop on Machine Learning for CAD (MLCAD).

[BibT_eX]

[DOI]

IEEE Des. Test, 2021

Stochastic Computing for Neuromorphic Applications.

[BibT_eX]

[DOI]

IEEE Des. Test, 2021

Cross-Layer Design of Cyber-Physical Systems.

[BibT_eX]

[DOI]

IEEE Des. Test, 2021

Machine Intelligence at the Edge.

[BibT_eX]

[DOI]

IEEE Des. Test, 2021

Top Picks in Hardware and Embedded Security.

[BibT_eX]

[DOI]

IEEE Des. Test, 2021

Open-Source Electronic Design Automation (EDA) Tools.

[BibT_eX]

[DOI]

IEEE Des. Test, 2021

From-the-EiC_38_1.

[BibT_eX]

[DOI]

IEEE Des. Test, 2021

Impact of NCFET on Neural Network Accelerators.

[BibT_eX]

[DOI]

IEEE Access, 2021

Minimizing Excess Timing Guard Banding Under Transistor Self-Heating Through Biasing at Zero-Temperature Coefficient.

[BibT_eX]

[DOI]

IEEE Access, 2021

Longevity of Commodity DRAMs in Harsh Environments Through Thermoelectric Cooling.

[BibT_eX]

[DOI]

IEEE Access, 2021

Reliability-Driven Voltage Optimization for NCFET-based SRAM Memory Banks.

[BibT_eX]

[DOI]

Proceedings of the 39th IEEE VLSI Test Symposium, 2021

A Cluster-Based and Drop-aware Extension of RPL to Provide Reliability in IoT Applications.

[BibT_eX]

[DOI]

Maryam Shirbeigi

Ali Asghar Mohammad Salehi

Veera Venkata Ram Murali Krishna Rao Muvva

Proceedings of the IEEE International Systems Conference, 2021

On the Effectiveness of Quantization and Pruning on the Performance of FPGAs-based NN Temperature Estimation.

[BibT_eX]

[DOI]

Proceedings of the 3rd ACM/IEEE Workshop on Machine Learning for CAD, 2021

TailoredCore: Generating Application-Specific RISC-V-based Cores.

[BibT_eX]

[DOI]

Jeferson González-Gómez

Steven Ávila-Ardón

Jonathan Rojas-González

Andres Stephen-Cantillano

Carlos Salazar-García

Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

Positive/Negative Approximate Multipliers for DNN Accelerators.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

LoopBreaker: Disabling Interconnects to Mitigate Voltage-Based Attacks in Multi-Tenant FPGAs.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

FeFET and NCFET for Future Neural Networks: Visions and Opportunities.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Reliability-Aware Quantization for Anti-Aging NPUs.

[BibT_eX]

[DOI]

Sami Salamin

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Long Short-Term Memory Neural Network-based Power Forecasting of Multi-Core Processors.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

TiVaPRoMi: Time-Varying Probabilistic Row-Hammer Mitigation.

[BibT_eX]

[DOI]

Hassan Nassar

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Control Variate Approximation for DNN Accelerators.

[BibT_eX]

[DOI]

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

SmartBoost: Lightweight ML-Driven Boosting for Thermally-Constrained Many-Core Processors.

[BibT_eX]

[DOI]

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

Multiple approximate instances in neural processing units for energy-efficient circuit synthesis: work-in-progress.

[BibT_eX]

[DOI]

Proceedings of the CASES '21: Proceedings of the 2021 International Conference on Compilers, Architectures, and Synthesis for Embedded Systems, Virtual Event, October 8, 2021

Impact of Negative Capacitance Field-Effect Transistor (NCFET) on Many-Core Systems.

[BibT_eX]

[DOI]

Proceedings of the A Journey of Embedded and Cyber-Physical Systems, 2021

Approximate Computing for ML: State-of-the-art, Challenges and Visions.

[BibT_eX]

[DOI]

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020

Combinatorial Auctions for Temperature-Constrained Resource Management in Manycores.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 2020

Introduction to the Special Issue on Machine Learning for CAD.

[BibT_eX]

[DOI]

Leandro Mateus Giacomini Rocha

Marilyn Wolf

ACM Trans. Design Autom. Electr. Syst., 2020

A Cross-Layer Gate-Level-to-Application Co-Simulation for Design Space Exploration of Approximate Circuits in HEVC Video Encoders.

[BibT_eX]

[DOI]

Guilherme Paim

Eduardo Antônio César da Costa

IEEE Trans. Circuits Syst. Video Technol., 2020

Weight-Oriented Approximation for Energy-Efficient Neural Network Inference Accelerators.

[BibT_eX]

[DOI]

Zois-Gerasimos Tasoulas

IEEE Trans. Circuits Syst., 2020

On the Workload Dependence of Self-Heating in FinFET Circuits.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2020

Aging Compensation With Dynamic Computation Approximation.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020

Exposing Hardware Trojans in Embedded Platforms via Short-Term Aging.

[BibT_eX]

[DOI]

Virinchi Roy Surabhi

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Fast Operation Mode Selection for Highly Efficient IoT Edge Devices.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Dynamic Power and Energy Management for NCFET-Based Processors.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

A Lightweight Nonlinear Methodology to Accurately Model Multicore Processor Power.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Machine Learning for Power, Energy, and Thermal Management on Multicore Processors: A Survey.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Toward Model Checking-Driven Fair Comparison of Dynamic Thermal Management Techniques Under Multithreaded Workloads.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

NPU Thermal Management.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Power- and Cache-Aware Task Mapping with Dynamic Power Budgeting for Many-Cores.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2020

Power Side-Channel Attacks in Negative Capacitance Transistor.

[BibT_eX]

[DOI]

IEEE Micro, 2020

Improved Feature Extraction Method for Sound Recognition Applied to Automatic Sorting of Recycling Wastes.

[BibT_eX]

[DOI]

J. Inf. Process., 2020

Hierarchical Classification for Constrained IoT Devices: A Case Study on Human Activity Recognition.

[BibT_eX]

[DOI]

IEEE Internet Things J., 2020

From the EIC: Education for Cyber-Physical Systems.

[BibT_eX]

[DOI]

IEEE Des. Test, 2020

From the EIC: From Smartphones to Wearable Devices.

[BibT_eX]

[DOI]

IEEE Des. Test, 2020

From the EIC: Special Issue on VTS.

[BibT_eX]

[DOI]

IEEE Des. Test, 2020

From the EIC: Special Issue on Image Processing, Correspondsing Hardware Architectures, and EDA Tools.

[BibT_eX]

[DOI]

IEEE Des. Test, 2020

From the EIC: Robust Machine Learning.

[BibT_eX]

[DOI]

IEEE Des. Test, 2020

From the EIC: Embedded Intelligence in the Internet-of-Things.

[BibT_eX]

[DOI]

IEEE Des. Test, 2020

Power Side-Channel Attacks in Negative Capacitance Transistor (NCFET).

[BibT_eX]

[DOI]

CoRR, 2020

Distributed Learning on Heterogeneous Resource-Constrained Devices.

[BibT_eX]

[DOI]

Ramin Khalili

CoRR, 2020

Run-Time Accuracy Reconfigurable Stochastic Computing for Dynamic Reliability and Power Management.

[BibT_eX]

[DOI]

CoRR, 2020

SoftWear: Software-Only In-Memory Wear-Leveling for Non-Volatile Main Memory.

[BibT_eX]

[DOI]

Christian Hakert

Kuan-Hsun Chen

Paul R. Genssler

Georg von der Brüggen

CoRR, 2020

Design Automation of Approximate Circuits With Runtime Reconfigurable Accuracy.

[BibT_eX]

[DOI]

IEEE Access, 2020

Hardware Trojan Detection Using Controlled Circuit Aging.

[BibT_eX]

[DOI]

Virinchi Roy Surabhi

IEEE Access, 2020

Impacts of Mobility Models on RPL-Based Mobile IoT Infrastructures: An Evaluative Comparison and Survey.

[BibT_eX]

[DOI]

Ali Asghar Mohammadsalehi

Kimia Talaei Khoosani

Saba Zarbaf

IEEE Access, 2020

Towards NN-based Online Estimation of the Full-Chip Temperature and the Rate of Temperature Change.

[BibT_eX]

[DOI]

Proceedings of the MLCAD '20: 2020 ACM/IEEE Workshop on Machine Learning for CAD, 2020

AUGER: A Tool for Generating Approximate Arithmetic Circuits.

[BibT_eX]

[DOI]

Deykel Hernández-Araya

Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020

Approximate Acceleration for CNN-based Applications on IoT Edge Devices.

[BibT_eX]

[DOI]

Deykel Hernández-Araya

Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020

Comparative Framework for the Analysis of Thermal and Resource Management Algorithms for Multi-Core Architectures.

[BibT_eX]

[DOI]

Moeez Akmal

Muhammad Sarmad Saeed

Muhammad Usama Sardar

Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

BTI and HCD Degradation in a Complete 32 × 64 bit SRAM Array - including Sense Amplifiers and Write Drivers - under Processor Activity.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

Impact of Radiation on Negative Capacitance FinFET.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

System Software for Resource Arbitration on Future Many-* Architectures.

[BibT_eX]

[DOI]

Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

Modeling Emerging Technologies using Machine Learning: Challenges and Opportunities.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Cell Library Characterization using Machine Learning for Design Technology Co-Optimization.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

AxHLS: Design Space Exploration and High-Level Synthesis of Approximate Accelerators using Approximate Functional Units and Analytical Models.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Energy Optimization in NCFET-based Processors.

[BibT_eX]

[DOI]

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

Impact of NBTI Aging on Self-Heating in Nanowire FET.

[BibT_eX]

[DOI]

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

Runtime Accuracy-Configurable Approximate Hardware Synthesis Using Logic Gating and Relaxation.

[BibT_eX]

[DOI]

Andreas Gerstlauer

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

Run-Time Accuracy Reconfigurable Stochastic Computing for Dynamic Reliability and Power Management: Work-in-Progress.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Compilers, 2020

Towards Quality-Driven Approximate Software Generation for Accurate Hardware: Work-in-Progress.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Compilers, 2020

Impact of Self-Heating on Performance, Power and Reliability in FinFET Technology.

[BibT_eX]

[DOI]

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

Machine Learning Based Online Full-Chip Heatmap Estimation.

[BibT_eX]

[DOI]

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

NCFET to Rescue Technology Scaling: Opportunities and Challenges.

[BibT_eX]

[DOI]

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019

Modeling the Interdependences Between Voltage Fluctuation and BTI Aging.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2019

Estimating and Mitigating Aging Effects in Routing Network of FPGAs.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2019

Oops: Optimizing Operation-mode Selection for IoT Edge Devices.

[BibT_eX]

[DOI]

ACM Trans. Internet Techn., 2019

ECAx: Balancing Error Correction Costs in Approximate Accelerators.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2019

Hybrid Scratchpad Video Memory Architecture for Energy-Efficient Parallel HEVC.

[BibT_eX]

[DOI]

Felipe Martin Sampaio

IEEE Trans. Circuits Syst. Video Technol., 2019

Modeling and Evaluating the Gate Length Dependence of BTI.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2019

Modeling and Mitigating Time-Dependent Variability From the Physical Level to the Circuit Level.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Dynamic Guardband Selection: Thermal-Aware Optimization for Unreliable Multi-Core Systems.

[BibT_eX]

[DOI]

Sai Manoj Pudukotai Dinakarrao

IEEE Trans. Computers, 2019

On the Efficiency of Voltage Overscaling under Temperature and Aging Effects.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2019

Application and Thermal-reliability-aware Reinforcement Learning Based Multi-core Power Management.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2019

From Cloud Down to Things: An Overview of Machine Learning in Internet of Things.

[BibT_eX]

[DOI]

IEEE Internet Things J., 2019

HotSniper: Sniper-Based Toolchain for Many-Core Thermal Simulations in Open Systems.

[BibT_eX]

[DOI]

IEEE Embed. Syst. Lett., 2019

From the EIC: Secure Automotive Systems.

[BibT_eX]

[DOI]

IEEE Des. Test, 2019

From the EIC: Smart and Autonomous Systems.

[BibT_eX]

[DOI]

IEEE Des. Test, 2019

From the EIC: Circuits and Systems for VLSI IoT Devices.

[BibT_eX]

[DOI]

IEEE Des. Test, 2019

From the EIC: Architecture Advances Enabled by Emerging Technologies.

[BibT_eX]

[DOI]

IEEE Des. Test, 2019

From the EIC: Intelligent Resource-Constrained Sensor Nodes.

[BibT_eX]

[DOI]

IEEE Des. Test, 2019

From the EIC: Special Section on Test.

[BibT_eX]

[DOI]

IEEE Des. Test, 2019

Thermally Composable Hybrid Application Mapping for Real-Time Applications in Heterogeneous Many-Core Systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE Real-Time Systems Symposium, 2019

Rebirth-FTL: Lifetime optimization via Approximate Storage for NAND Flash.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE Non-Volatile Memory Systems and Applications Symposium, 2019

NCFET-Aware Voltage Scaling.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019

Aging Gracefully with Approximation.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Impact of NBTI on Increasing the Susceptibility of FinFET to Radiation.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Reliability Physics Symposium, 2019

Reliability Challenges with Self-Heating and Aging in FinFET Technology.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

The Impact of Emerging Technologies on Architectures and System-level Management: Invited Paper.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computer-Aided Design, 2019

WCET Guarantees for Opportunistic Runtime Reconfiguration.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computer-Aided Design, 2019

Analyses and architectures for mixed-critical systems: industry trends and research perspective.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Embedded Software Companion, 2019

Selecting the Optimal Energy Point in Near-Threshold Computing.

[BibT_eX]

[DOI]

Sami Salamin

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Hot Spot Identification and System Parameterized Thermal Modeling for Multi-Core Processors Through Infrared Thermal Imaging.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Prediction-Based Task Migration on S-NUCA Many-Cores.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

DMRM: Distributed Market-Based Resource Management of Edge Computing Systems.

[BibT_eX]

[DOI]

Manolis Katsaragakis

Dimosthenis Masouros

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Thermal-Awareness in a Soft Error Tolerant Architecture.

[BibT_eX]

[DOI]

Sajjad Hussain

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

A Fine-Grained Soft Error Resilient Architecture under Power Considerations.

[BibT_eX]

[DOI]

Sajjad Hussain

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Smart Thermal Management for Heterogeneous Multicores.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Performance, Power and Cooling Trade-Offs with NCFET-based Many-Cores.

[BibT_eX]

[DOI]

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

Heterogeneous Approximate Multipliers: Architectures and Design Methodologies.

[BibT_eX]

[DOI]

Bharath Srinivas Prabakaran

Walaa El-Harouni

Proceedings of the Approximate Circuits, Methodologies and CAD., 2019

2018

Preemption of the Partial Reconfiguration Process to Enable Real-Time Computing With FPGAs.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., 2018

Guest Editorial for the Special Issue of ESWEEK 2016.

[BibT_eX]

[DOI]

Petru Eles

ACM Trans. Embed. Comput. Syst., 2018

Distributed Trade-Based Edge Device Management in Multi-Gateway IoT.

[BibT_eX]

[DOI]

ACM Trans. Cyber Phys. Syst., 2018

Reliability in Super- and Near-Threshold Computing: A Unified Model of RTN, BTI, and PV.

[BibT_eX]

[DOI]

Montserrat Nafría

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Co-Scheduling on Fused CPU-GPU Architectures With Shared Last Level Caches.

[BibT_eX]

[DOI]

Frank Mueller

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

SlackHammer: Logic Synthesis for Graceful Errors Under Frequency Scaling.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Aging-Aware Boosting.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2018

Recent advances in EM and BTI induced reliability modeling, analysis and optimization (invited).

[BibT_eX]

[DOI]

Integr., 2018

Guest Editors' Introduction.

[BibT_eX]

[DOI]

Sybille Hellebrand

Anand Raghunathan

IEEE Embed. Syst. Lett., 2018

Managing Electric Vehicles.

[BibT_eX]

[DOI]

IEEE Des. Test, 2018

Self-Awareness in Systems on Chip, Part II.

[BibT_eX]

[DOI]

IEEE Des. Test, 2018

Time-Critical Systems Design, Part II.

[BibT_eX]

[DOI]

IEEE Des. Test, 2018

Test for Automotive.

[BibT_eX]

[DOI]

IEEE Des. Test, 2018

From the EIC: Time-Critical Systems Design.

[BibT_eX]

[DOI]

IEEE Des. Test, 2018

Design and Test of Energy-Efficient, High-Performance, and Secure Computing Technologies via Accelerators.

[BibT_eX]

[DOI]

IEEE Des. Test, 2018

Negative Capacitance Transistor to Address the Fundamental Limitations in Technology Scaling: Processor Performance.

[BibT_eX]

[DOI]

IEEE Access, 2018

Chapter Four - Dark Silicon Aware Resource Management for Many-Core Systems.

[BibT_eX]

[DOI]

Adv. Comput., 2018

Voltage Adaptation Under Temperature Variation.

[BibT_eX]

[DOI]

Behnam Khaleghi

Proceedings of the 15th International Conference on Synthesis, 2018

Scalable Dynamic Task Scheduling on Adaptive Many-Core.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2018

Pareto-Optimal Power- and Cache-Aware Task Mapping for Many-Cores with Distributed Shared Last-Level Cache.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Low Power Electronics and Design, 2018

Weighted time lag plot defect parameter extraction and GPU-based BTI modeling for BTI variability.

[BibT_eX]

[DOI]

Javier Diaz-Fortuny

Rosana Rodríguez

Rafael Castro-López

Elisenda Roca

Francisco V. Fernández

Montserrat Nafría

Proceedings of the IEEE International Reliability Physics Symposium, 2018

Reliability Estimations of Large Circuits in Massively-Parallel GPU-SPICE.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018

Trading Off Temperature Guardbands via Adaptive Approximations.

[BibT_eX]

[DOI]

Proceedings of the 36th IEEE International Conference on Computer Design, 2018

Dynamic resource management for heterogeneous many-cores.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computer-Aided Design, 2018

Estimating and optimizing BTI aging effects: from physics to CAD.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computer-Aided Design, 2018

Highly efficient and accurate seizure prediction on constrained IoT devices.

[BibT_eX]

[DOI]

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Task scheduling for many-cores with S-NUCA caches.

[BibT_eX]

[DOI]

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Compiler-driven error analysis for designing approximate accelerators.

[BibT_eX]

[DOI]

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

QoS-aware stochastic power management for many-cores.

[BibT_eX]

[DOI]

Proceedings of the 55th Annual Design Automation Conference, 2018

Aging-constrained performance optimization for multi cores.

[BibT_eX]

[DOI]

Proceedings of the 55th Annual Design Automation Conference, 2018

2017

Design Space Exploration and Run-Time Adaptation for Multicore Resource Management Under Performance and Power Constraints.

[BibT_eX]

[DOI]

Santiago Pagani

Proceedings of the Handbook of Hardware/Software Codesign., 2017

Efficient Partial Online Synthesis of Special Instructions for Reconfigurable Processors.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2017

Timing Analysis of Tasks on Runtime Reconfigurable Processors.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2017

Energy Efficiency for Clustered Heterogeneous Multicores.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 2017

Optimal Greedy Algorithm for Many-Core Scheduling.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Aging Resilience and Fault Tolerance in Runtime Reconfigurable Architectures.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2017

Application-Guided Power-Efficient Fault Tolerance for H.264 Context Adaptive Variable Length Coding.

[BibT_eX]

[DOI]

Arun Subramaniyan

Bruno Boessio Vizzotto

IEEE Trans. Computers, 2017

Thermal Safe Power (TSP): Efficient Power Budgeting for Heterogeneous Manycore Systems in Dark Silicon.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2017

Probabilistic Error Modeling for Approximate Adders.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2017

Fine-Grained Checkpoint Recovery for Application-Specific Instruction-Set Processors.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2017

Power Density-Aware Resource Management for Heterogeneous Tiled Multicores.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2017

Defragmentation of Tasks in Many-Core Architecture.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2017

FAMe-TM: Formal analysis methodology for task migration algorithms in Many-Core systems.

[BibT_eX]

[DOI]

Sci. Comput. Program., 2017

Complexity control of HEVC encoders targeting real-time constraints.

[BibT_eX]

[DOI]

J. Real Time Image Process., 2017

Theorem proving based Formal Verification of Distributed Dynamic Thermal Management schemes.

[BibT_eX]

[DOI]

Muhammad Usama Sardar

Osman Hasan

J. Parallel Distributed Comput., 2017

CoRQ: Enabling Runtime Reconfiguration Under WCET Guarantees for Real-Time Systems.

[BibT_eX]

[DOI]

IEEE Embed. Syst. Lett., 2017

Report of the 2016 Embedded Systems Week (ESWEEK).

[BibT_eX]

[DOI]

Lothar Thiele

IEEE Des. Test, 2017

Self-Aware On-Chip Systems.

[BibT_eX]

[DOI]

IEEE Des. Test, 2017

Verification and Test.

[BibT_eX]

[DOI]

IEEE Des. Test, 2017

Cyber-Physical Systems Security and Privacy.

[BibT_eX]

[DOI]

IEEE Des. Test, 2017

Emerging Memory Technologies.

[BibT_eX]

[DOI]

IEEE Des. Test, 2017

Power Density.

[BibT_eX]

[DOI]

IEEE Des. Test, 2017

3D Test.

[BibT_eX]

[DOI]

IEEE Des. Test, 2017

Interdependencies of Degradation Effects and Their Impact on Computing.

[BibT_eX]

[DOI]

IEEE Des. Test, 2017

Computer Engineers' Challenges for the Next Decade: The Triangle of Power Density, Circuit Degradation, and Reliability.

[BibT_eX]

[DOI]

Paolo Montuschi

Computer, 2017

The triangle of power density, circuit degradation and reliability.

[BibT_eX]

[DOI]

Proceedings of the 30th IEEE International System-on-Chip Conference, 2017

Auto-SI: An adaptive reconfigurable processor with run-time loop detection and acceleration.

[BibT_eX]

[DOI]

Proceedings of the 30th IEEE International System-on-Chip Conference, 2017

Containing Guardbands: From the Macro to Micro Time Domain.

[BibT_eX]

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2017

Shallow Water Waves on a Deep Technology Stack: Accelerating a Finite Volume Tsunami Model Using Reconfigurable Hardware in Invasive Computing.

[BibT_eX]

[DOI]

Michael Bader

Proceedings of the Euro-Par 2017: Parallel Processing Workshops, 2017

Evaluating and mitigating degradation effects in multimedia circuits.

[BibT_eX]

[DOI]

Proceedings of the 15th IEEE/ACM Symposium on Embedded Systems for Real-Time Multimedia, 2017

Hardware and software innovations in energy-efficient system-reliability monitoring.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2017

Scalable probabilistic power budgeting for many-cores.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Ultra-low power and dependability for IoT devices (Invited paper for IoT technologies).

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

CAnDy-TM: Comparative analysis of dynamic thermal management in many-cores using model checking.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Optimizing temperature guardbands.

[BibT_eX]

[DOI]

Behnam Khaleghi

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Soft error-aware architectural exploration for designing reliability adaptive cache hierarchies in multi-cores.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Towards Aging-Induced Approximations.

[BibT_eX]

[DOI]

Proceedings of the 54th Annual Design Automation Conference, 2017

Emerging (un-)reliability based security threats and mitigations for embedded systems: special session.

[BibT_eX]

[DOI]

Proceedings of the 2017 International Conference on Compilers, 2017

Containing guardbands.

[BibT_eX]

[DOI]

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016

Analysis and Mapping for Thermal and Energy Efficiency of 3-D Video Processing on 3-D Multicore Processors.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2016

Two-State Checkpointing for Energy-Efficient Fault Tolerance in Hard Real-Time Systems.

[BibT_eX]

[DOI]

Mohammad Salehi

Mohammad Khavari Tavana

IEEE Trans. Very Large Scale Integr. Syst., 2016

Power-Efficient Workload Balancing for Video Applications.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2016

SPMPool: Runtime SPM Management for Memory-Intensive Applications in Embedded Many-Cores.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2016

Reliability-Aware Adaptations for Shared Last-Level Caches in Multi-Cores.

[BibT_eX]

[DOI]

Segnon Jean Bruno Ahandagbe

Arun Subramaniyan

ACM Trans. Embed. Comput. Syst., 2016

Resource and Throughput Aware Execution Trace Analysis for Efficient Run-Time Mapping on MPSoCs.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Architecting On-Chip DRAM Cache for Simultaneous Miss Rate and Latency Reduction.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Content-Aware Low-Power Configurable Aging Mitigation for SRAM Memories.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2016

Scalable Power Management for On-Chip Systems with Malleable Applications.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2016

Cross-Layer Software Dependability on Unreliable Hardware.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2016

Task Mapping for Redundant Multithreading in Multi-Cores with Reliability and Performance Heterogeneity.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2016

Extending the WCET Problem to Optimize for Runtime-Reconfigurable Processors.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2016

Invasive computing for timing-predictable stream processing on MPSoCs.

[BibT_eX]

[DOI]

Andreas Weichslgartner

Andreas Zwinkau

it Inf. Technol., 2016

Dark silicon management: an integrated and coordinated cross-layer approach.

[BibT_eX]

[DOI]

Doris Schmitt-Landsiedel

it Inf. Technol., 2016

Variability and Reliability Awareness in the Age of Dark Silicon.

[BibT_eX]

[DOI]

IEEE Des. Test, 2016

Best in Test.

[BibT_eX]

[DOI]

IEEE Des. Test, 2016

New Directions in Analog/Mixed-Signal Design and Test.

[BibT_eX]

[DOI]

IEEE Des. Test, 2016

Designing and Testing Implantable Medical Devices.

[BibT_eX]

[DOI]

IEEE Des. Test, 2016

Robustness for 3-D Circuits - Industrial Perspectives.

[BibT_eX]

[DOI]

IEEE Des. Test, 2016

Three-Dimensional Integrated Circuits.

[BibT_eX]

[DOI]

IEEE Des. Test, 2016

Approximate Computing: Solving Computing's Inefficiency Problem?

[BibT_eX]

[DOI]

IEEE Des. Test, 2016

Computation offloading and resource allocation for low-power IoT edge devices.

[BibT_eX]

[DOI]

Proceedings of the 3rd IEEE World Forum on Internet of Things, 2016

Cross-Layer Reliability Modeling and Optimization: Compiler and Run-Time System Interactions.

[BibT_eX]

[DOI]

Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems, 2016

An Energy-Efficient Middleware for Computation Offloading in Real-Time Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2016

Designing reliable, yet energy-efficient guardbands.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

Architectural-space exploration of approximate multipliers.

[BibT_eX]

[DOI]

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

Stress-aware routing to mitigate aging effects in SRAM-based FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

Aging-aware voltage scaling.

[BibT_eX]

[DOI]

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Distributed fair scheduling for many-cores.

[BibT_eX]

[DOI]

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Thermal optimization using adaptive approximate computing for video coding.

[BibT_eX]

[DOI]

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Power-efficient load-balancing on heterogeneous computing platforms.

[BibT_eX]

[DOI]

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Formal probabilistic analysis of distributed resource management schemes in on-chip systems.

[BibT_eX]

[DOI]

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Towards performance and reliability-efficient computing in the dark silicon era.

[BibT_eX]

[DOI]

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Resource budgeting for reliability in reconfigurable architectures.

[BibT_eX]

[DOI]

Hongyan Zhang

Proceedings of the 53rd Annual Design Automation Conference, 2016

Invited - Cross-layer approximate computing: from logic to architectures.

[BibT_eX]

[DOI]

Proceedings of the 53rd Annual Design Automation Conference, 2016

Designing guardbands for instantaneous aging effects.

[BibT_eX]

[DOI]

Montserrat Nafría

Proceedings of the 53rd Annual Design Automation Conference, 2016

Improving mobile gaming performance through cooperative CPU-GPU thermal management.

[BibT_eX]

[DOI]

Proceedings of the 53rd Annual Design Automation Conference, 2016

Distributed scheduling for many-cores using cooperative game theory.

[BibT_eX]

[DOI]

Proceedings of the 53rd Annual Design Automation Conference, 2016

An area-efficient consolidated configurable error correction for approximate hardware accelerators.

[BibT_eX]

[DOI]

Proceedings of the 53rd Annual Design Automation Conference, 2016

ageOpt-RMT: compiler-driven variation-aware aging optimization for redundant multithreading.

[BibT_eX]

[DOI]

Proceedings of the 53rd Annual Design Automation Conference, 2016

Reliability-aware design to suppress aging.

[BibT_eX]

[DOI]

Proceedings of the 53rd Annual Design Automation Conference, 2016

Distributed QoS management for internet of things under resource constraints.

[BibT_eX]

[DOI]

Proceedings of the Eleventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2016

IoT technologies for embedded computing: a survey.

[BibT_eX]

[DOI]

Proceedings of the Eleventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2016

Power and thermal management in massive multicore chips: theoretical foundation meets architectural innovation and resource allocation.

[BibT_eX]

[DOI]

Proceedings of the 2016 International Conference on Compilers, 2016

Reliable Software for Unreliable Hardware - A Cross Layer Perspective.

[BibT_eX]

[DOI]

Springer, ISBN: 978-3-319-25770-9, 2016

2015

Runtime Resource Allocation for Software Pipelines.

[BibT_eX]

[DOI]

ACM Trans. Parallel Comput., 2015

Energy and Peak Power Efficiency Analysis for the Single Voltage Approximation (SVA) Scheme.

[BibT_eX]

[DOI]

Santiago Pagani

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Multicast FullHD H.264 Intra Video Encoder Architecture.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

A Reconfigurable Hardware Architecture for Fractional Pixel Interpolation in High Efficiency Video Coding.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Resource-awareness on heterogeneous MPSoCs for image processing.

[BibT_eX]

[DOI]

J. Syst. Archit., 2015

Dependable embedded systems.

[BibT_eX]

[DOI]

it Inf. Technol., 2015

Adaptive multi-layer techniques for increased system dependability.

[BibT_eX]

[DOI]

Johannes Maximilian Kühn

Hongyan Zhang

it Inf. Technol., 2015

Probabilistic Formal Verification Methodology for Decentralized Thermal Management in On-Chip Systems.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE International Conference on Enabling Technologies: Infrastructure for Collaborative Enterprises, 2015

Dark Silicon: From Computation to Communication.

[BibT_eX]

[DOI]

Haseeb Bokhari

Siddharth Garg

Proceedings of the 9th International Symposium on Networks-on-Chip, 2015

DRVS: Power-efficient reliability management through Dynamic Redundancy and Voltage Scaling under variations.

[BibT_eX]

[DOI]

Mohammad Salehi

Mohammad Khavari Tavana

Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

Power management for mobile games on asymmetric multi-cores.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

Hierarchical power budgeting for Dark Silicon chips.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

Lucid infrared thermography of thermally-constrained processors.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

Energy-efficient multimedia systems for high efficiency video coding.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Connecting the physical and application level towards grasping aging effects.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Reliability Physics Symposium, 2015

Reliability degradation in the scope of aging - From physical to system level.

[BibT_eX]

[DOI]

Proceedings of the 10th International Design & Test Symposium, 2015

STRAP: Stress-Aware Placement for Aging Mitigation in Runtime Reconfigurable Architectures.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Mitigating the Power Density and Temperature Problems in the Nano-Era.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Thermal-aware power budgeting for dark silicon chips.

[BibT_eX]

[DOI]

Proceedings of the Sixth International Green and Sustainable Computing Conference, 2015

Floating point acceleration for stream processing applications in dynamically reconfigurable processors.

[BibT_eX]

[DOI]

Srinivas Rao Kerekare

Proceedings of the 13th IEEE Symposium on Embedded Systems For Real-time Multimedia, 2015

E-pipeline: elastic hardware/software pipelines on a many-core fabric.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Variability-aware dark silicon management in on-chip many-core systems.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Online binding of applications to multiple clock domains in shared FPGA-based systems.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

MatEx: efficient transient and peak temperature computation for compact thermal models.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

ACSEM: accuracy-configurable fast soft error masking analysis in combinatorial circuits.

[BibT_eX]

[DOI]

Duo Sun

Pau Vilimelis Aceituno

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Adaptive on-the-fly application performance modeling for many cores.

[BibT_eX]

[DOI]

Sebastian Kobbe

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Power-efficient accelerator allocation in adaptive dark silicon many-core systems.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Formal probabilistic analysis of distributed dynamic thermal management.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

A deblocking filter hardware architecture for the high efficiency video coding standard.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Malleable NoC: dark silicon inspired adaptable Network-on-Chip.

[BibT_eX]

[DOI]

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

EnAAM: energy-efficient anti-aging for on-chip video memories.

[BibT_eX]

[DOI]

Adnan Orcun Tüfek

Proceedings of the 52nd Annual Design Automation Conference, 2015

A low latency generic accuracy configurable adder.

[BibT_eX]

[DOI]

Proceedings of the 52nd Annual Design Automation Conference, 2015

Thermal constrained resource management for mixed ILP-TLP workloads in dark silicon chips.

[BibT_eX]

[DOI]

Proceedings of the 52nd Annual Design Automation Conference, 2015

New trends in dark silicon.

[BibT_eX]

[DOI]

Proceedings of the 52nd Annual Design Automation Conference, 2015

Hayat: harnessing dark silicon and variability for aging deceleration and balancing.

[BibT_eX]

[DOI]

Proceedings of the 52nd Annual Design Automation Conference, 2015

SuperNet: multimode interconnect architecture for manycore chips.

[BibT_eX]

[DOI]

Proceedings of the 52nd Annual Design Automation Conference, 2015

An approximate compressor for wearable biomedical healthcare monitoring systems.

[BibT_eX]

[DOI]

Proceedings of the 2015 International Conference on Hardware/Software Codesign and System Synthesis, 2015

dsReliM: Power-constrained reliability management in Dark-Silicon many-core chips under process variations.

[BibT_eX]

[DOI]

Mohammad Khavari Tavana

Proceedings of the 2015 International Conference on Hardware/Software Codesign and System Synthesis, 2015

seBoost: Selective boosting for heterogeneous manycores.

[BibT_eX]

[DOI]

Proceedings of the 2015 International Conference on Hardware/Software Codesign and System Synthesis, 2015

R2Cache: Reliability-aware reconfigurable last-level cache architecture for multi-cores.

[BibT_eX]

[DOI]

Arun Subramaniyan

Segnon Jean Bruno Ahandagbe

Proceedings of the 2015 International Conference on Hardware/Software Codesign and System Synthesis, 2015

Approximation-aware Multi-Level Cells STT-RAM cache architecture.

[BibT_eX]

[DOI]

Proceedings of the 2015 International Conference on Compilers, 2015

ADAPT: An adaptive manycore methodology for software pipelined applications.

[BibT_eX]

[DOI]

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014

Adaptive Energy Management for Dynamically Reconfigurable Processors.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Reliability-Driven Software Transformations for Unreliable Hardware.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Energy-Efficient Adaptive Pipelined MPSoCs for Multimedia Applications.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

RESI: Register-Embedded Self-Immunity for Reliability Enhancement.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Adaptive embedded computing with i-core.

[BibT_eX]

[DOI]

SIGBED Rev., 2014

Resilience Articulation Point (RAP): Cross-layer dependability modeling for nanometer system-on-chip resilience.

[BibT_eX]

[DOI]

Microelectron. Reliab., 2014

Selected Peer-Reviewed Articles from the 4th European Workshop on CMOS Variability, Karlsruhe, Germany, September 9-11, 2013.

[BibT_eX]

[DOI]

Nadine Azémard

J. Low Power Electron., 2014

Dark Silicon - A thermal perspective.

[BibT_eX]

[DOI]

Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014

High-speed enoding/decoding technique for reliable data transmission in wireless sensor networks.

[BibT_eX]

[DOI]

M. Sammer Srouji

Proceedings of the Eleventh Annual IEEE International Conference on Sensing, 2014

Messages from the conference chairs.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications, 2014

Power- and area-efficient Approximate Wallace Tree Multiplier for error-resilient systems.

[BibT_eX]

[DOI]

Kartikeya Bhardwaj

Pravin S. Mane

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

Content-driven memory pressure balancing and video memory power management for parallel high efficiency video coding.

[BibT_eX]

[DOI]

Felipe Martin Sampaio

Proceedings of the International Symposium on Low Power Electronics and Design, 2014

TONE: adaptive temperature optimization for the next generation video encoders.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Low Power Electronics and Design, 2014

Peak Power Management for scheduling real-time tasks on heterogeneous many-core systems.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE International Conference on Parallel and Distributed Systems, 2014

Power efficient and workload balanced tiling for parallelized high efficiency video coding.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE International Conference on Image Processing, 2014

Fast hierarchical intra angular mode selection for high efficiency video coding.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE International Conference on Image Processing, 2014

Energy-efficient architecture for advanced video memory.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Towards interdependencies of aging mechanisms.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Formal Verification of Distributed Task Migration for Thermal Management in On-Chip Multi-core Systems Using nuXmv.

[BibT_eX]

[DOI]

Proceedings of the Formal Techniques for Safety-Critical Systems, 2014

Run-time accelerator binding for tile-based mixed-grained reconfigurable architectures.

[BibT_eX]

[DOI]

Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

MORP: makespan optimization for processors with an embedded reconfigurable fabric.

[BibT_eX]

[DOI]

Proceedings of the 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2014

Dependable task and communication migration in tiled manycore system-on-chip.

[BibT_eX]

[DOI]

Proceedings of the 2014 Forum on Specification and Design Languages, 2014

dSVM: Energy-efficient distributed Scratchpad Video Memory Architecture for the next-generation High Efficiency Video Coding.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Compiler-driven dynamic reliability management for on-chip systems under variabilities.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

hevcDTM: Application-driven Dynamic Thermal Management for High Efficiency Video Coding.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

mDTM: Multi-objective dynamic thermal management for on-chip systems.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Software architecture of High Efficiency Video Coding for many-core systems with power-efficient workload balancing.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

GUARD: GUAranteed Reliability in Dynamically Reconfigurable Systems.

[BibT_eX]

[DOI]

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

The EDA Challenges in the Dark Silicon Era: Temperature, Reliability, and Variability Perspectives.

[BibT_eX]

[DOI]

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

dTune: Leveraging Reliable Code Generation for Adaptive Dependability Tuning under Process Variation and Aging-Induced Effects.

[BibT_eX]

[DOI]

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

ASER: Adaptive Soft Error Resilience for Reliability-Heterogeneous Processors in the Dark Silicon Era.

[BibT_eX]

[DOI]

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Multi-Layer Dependability: From Microarchitecture to Application Level.

[BibT_eX]

[DOI]

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

CAP: Communication Aware Programming.

[BibT_eX]

[DOI]

Andreas Weichslgartner

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Reducing Latency in an SRAM/DRAM Cache Hierarchy via a Novel Tag-Cache Architecture.

[BibT_eX]

[DOI]

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

darkNoC: Designing Energy-Efficient Network-on-Chip with Multi-Vt Cells for Dark Silicon.

[BibT_eX]

[DOI]

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Dark silicon as a challenge for hardware/software co-design.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014

TSP: Thermal Safe Power - Efficient power budgeting for many-core systems in dark silicon.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014

Hardware/software co-design for a wireless sensor network platform.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014

Automatic custom instruction identification in memory streaming algorithms.

[BibT_eX]

[DOI]

Martin Haaß

Proceedings of the 2014 International Conference on Compilers, 2014

COREFAB: Concurrent reconfigurable fabric utilization in heterogeneous multi-core systems.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Conference on Compilers, 2014

Low power design of the next-generation High Efficiency Video Coding.

[BibT_eX]

[DOI]

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013

Guest Editorial Special Section on Power-Aware Design for Embedded Systems.

[BibT_eX]

[DOI]

IEEE Trans. Ind. Informatics, 2013

Model Predictive Hierarchical Rate Control With Markov Decision Process for Multiview Video Coding.

[BibT_eX]

[DOI]

Bruno Boessio Vizzotto

IEEE Trans. Circuits Syst. Video Technol., 2013

Test Strategies for Reliable Runtime Reconfigurable Architectures.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2013

Embedded on-chip reliability: it's a thermal challenge.

[BibT_eX]

[DOI]

Proceedings of the International Workshop on Software and Compilers for Embedded Systems, 2013

Reliable code generation and execution on unreliable hardware under joint functional and timing reliability considerations.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE Real-Time and Embedded Technology and Applications Symposium, 2013

Fast HEVC intra mode decision algorithm based on new evaluation order in the Coding Tree Block.

[BibT_eX]

[DOI]

Eduardo Cavichioli

Proceedings of the 30th Picture Coding Symposium, 2013

Module diversification: Fault tolerance and aging mitigation for runtime reconfigurable architectures.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Test Conference, 2013

Content-driven adaptive computation offloading for energy-aware hybrid distributed video coding.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013

Content-adaptive reference frame compression based on intra-frame prediction for multiview video coding.

[BibT_eX]

[DOI]

Felipe Sampaio

Proceedings of the IEEE International Conference on Image Processing, 2013

An adaptive complexity reduction scheme with fast prediction unit decision for HEVC intra encoding.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Image Processing, 2013

An adaptive workload management scheme for HEVC encoding.

[BibT_eX]

[DOI]

Mateus Grellert

Júlio C. B. de Mattos

Proceedings of the IEEE International Conference on Image Processing, 2013

High-throughput interpolation hardware architecture with coarse-grained reconfigurable datapaths for HEVC.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Image Processing, 2013

Agent-based distributed power management for kilo-core processors.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

AMBER: adaptive energy management for on-chip hybrid video memories.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

MOMA: mapping of memory-intensive software-pipelined applications for systems with multiple memory controllers.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

Formal verification of distributed dynamic thermal management.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

ISOMER: integrated selection, partitioning, and placement methodology for reconfigurable architectures.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

DHASER: dynamic heterogeneous adaptation for soft-error resiliency in ASIP-based multi-core systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

Analyzing the thermal hotspots in FPGA-based embedded systems.

[BibT_eX]

[DOI]

Josef Schneider

Sridevan Parameswaran

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

Accurate Thermal-Profile Estimation and Validation for FPGA-Mapped Circuits.

[BibT_eX]

[DOI]

Mehdi Baradaran Tahoori

Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013

Message from the chairs.

[BibT_eX]

[DOI]

Proceedings of the 11th IEEE Symposium on Embedded Systems for Real-time Multimedia, 2013

Stress balancing to mitigate NBTI effects in register files.

[BibT_eX]

[DOI]

Proceedings of the 2013 43rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), 2013

Fast and accurate cache modeling in source-level simulation of embedded software.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2013

Self-adaptive hybrid dynamic power management for many-core systems.

[BibT_eX]

[DOI]

Benjamin Vogel

Proceedings of the Design, Automation and Test in Europe, 2013

Energy-efficient memory hierarchy for motion and disparity estimation in multiview video coding.

[BibT_eX]

[DOI]

Felipe Sampaio

Proceedings of the Design, Automation and Test in Europe, 2013

Leveraging variable function resilience for selective software reliability on unreliable hardware.

[BibT_eX]

[DOI]

Pau Vilimelis Aceituno

Proceedings of the Design, Automation and Test in Europe, 2013

CSER: HW/SW configurable soft-error resiliency for application specific instruction-set processors.

[BibT_eX]

[DOI]

Tuo Li

Swarnalatha Radhakrishnan

Proceedings of the Design, Automation and Test in Europe, 2013

Hardware-software collaborative complexity reduction scheme for the emerging HEVC intra encoder.

[BibT_eX]

[DOI]

Mateus Grellert

Proceedings of the Design, Automation and Test in Europe, 2013

An H.264 Quad-FullHD low-latency intra video encoder.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2013

Pipelets: self-organizing software pipelines for many-core architectures.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2013

DANCE: distributed application-aware node configuration engine in shared reconfigurable sensor networks.

[BibT_eX]

[DOI]

Chih-Ming Hsieh

Proceedings of the Design, Automation and Test in Europe, 2013

Adaptive cache management for a combined SRAM and DRAM cache hierarchy for multi-cores.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2013

Mapping on multi/many-core systems: survey of current and emerging trends.

[BibT_eX]

[DOI]

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

Exploiting program-level masking and error propagation for constrained reliability optimization.

[BibT_eX]

[DOI]

Pau Vilimelis Aceituno

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

RASTER: runtime adaptive spatial/temporal error resiliency for embedded processors.

[BibT_eX]

[DOI]

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

Optimizations for configuring and mapping software pipelines in many core systems.

[BibT_eX]

[DOI]

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

Reliable on-chip systems in the nano-era: lessons learnt and future trends.

[BibT_eX]

[DOI]

Mehdi Baradaran Tahoori

Norbert Wehn

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

Run-time adaption for highly-complex multi-core systems.

[BibT_eX]

[DOI]

Vijaykrishnan Narayanan

Jürgen Teich

Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2013

Reducing inter-core cache contention with an adaptive bank mapping policy in DRAM cache.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2013

Hardware acceleration for programs in SSA form.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Compilers, 2013

Simultaneously optimizing DRAM cache hit latency and miss rate via novel set mapping policies.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Compilers, 2013

Thermal management for dependable on-chip systems.

[BibT_eX]

[DOI]

Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

3D Video Coding for Embedded Devices - Energy Efficient Algorithms and Architectures.

[BibT_eX]

[DOI]

Springer, ISBN: 978-1-4614-6758-8, 2013

2012

AdNoC: Runtime Adaptive Network-on-Chip Architecture.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2012

ECO/ee: Energy-aware Collaborative Organic execution environment for wireless sensor networks.

[BibT_eX]

[DOI]

Chih-Ming Hsieh

Proceedings of the 2012 IEEE Wireless Communications and Networking Conference, 2012

Adaptive processor architecture - invited paper.

[BibT_eX]

[DOI]

Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

A complexity reduction scheme with adaptive search direction and mode elimination for multiview video coding.

[BibT_eX]

[DOI]

Proceedings of the 2012 Picture Coding Symposium, 2012

Work in Progress: Malleable Software Pipelines for Efficient Many-core System Utilization.

[BibT_eX]

[DOI]

Proceedings of the 6th Many-core Applications Research Community (MARC) Symposium. Proceedings of the 6th MARC Symposium, 2012

An adaptive data gathering strategy for target tracking in cluster-based wireless sensor networks.

[BibT_eX]

[DOI]

Juan Feng

Proceedings of the 2012 IEEE Symposium on Computers and Communications, 2012

Transparent structural online test for reconfigurable systems.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE International On-Line Testing Symposium, 2012

A Reconfigurable Hardware Accelerated Platform for Clustered Wireless Sensor Networks.

[BibT_eX]

[DOI]

Chih-Ming Hsieh

Proceedings of the 18th IEEE International Conference on Parallel and Distributed Systems, 2012

A Model Predictive Controller for Frame-Level Rate Control in Multiview Video Coding.

[BibT_eX]

[DOI]

Bruno Boessio Vizzotto

Proceedings of the 2012 IEEE International Conference on Multimedia and Expo, 2012

PATS: A Performance Aware Task Scheduler for Runtime Reconfigurable Processors.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012

Dependable embedded systems: The German research foundation DFG priority program SPP 1500.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE European Test Symposium, 2012

Accurate source-level simulation of embedded software with respect to compiler optimizations.

[BibT_eX]

[DOI]

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Power-efficient error-resiliency for H.264/AVC Context-Adaptive Variable Length Coding.

[BibT_eX]

[DOI]

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Dynamic cache management in multi-core architectures through run-time adaptation.

[BibT_eX]

[DOI]

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Partial online-synthesis for mixed-grained reconfigurable architectures.

[BibT_eX]

[DOI]

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Adaptive power management of on-chip video memory for multiview video coding.

[BibT_eX]

[DOI]

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Instruction scheduling for reliability-aware compilation.

[BibT_eX]

[DOI]

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

HyCoS: hybrid compiled simulation of embedded software with target dependent code.

[BibT_eX]

[DOI]

Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012

A hierarchical control scheme for energy quota distribution in hybrid distributed video coding.

[BibT_eX]

[DOI]

Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012

COOL: control-based optimization of load-balancing for thermal behavior.

[BibT_eX]

[DOI]

Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012

RAISE: Reliability-Aware Instruction SchEduling for unreliable hardware.

[BibT_eX]

[DOI]

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

Invasive manycore architectures.

[BibT_eX]

[DOI]

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

OTERA: Online test strategies for reliable reconfigurable architectures - Invited paper for the AHS-2012 special session "Dependability by reconfigurable hardware".

[BibT_eX]

[DOI]

Proceedings of the 2012 NASA/ESA Conference on Adaptive Hardware and Systems, 2012

2011

Self-Immunity Technique to Improve Register File Integrity Against Soft Errors.

[BibT_eX]

[DOI]

Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011

Dynamic Processor Reconfiguration.

[BibT_eX]

[DOI]

Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

Agent-Based Thermal Management Using Real-Time I/O Communication Relocation for 3D Many-Cores.

[BibT_eX]

[DOI]

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2011

Dependable Embedded Systems - Introduction and overview of the DFG SPP-1500.

[BibT_eX]

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2011

An Empirical Feedback Provider for Multi Core Schedulers.

[BibT_eX]

[DOI]

Proceedings of the 3rd Many-core Applications Research Community (MARC) Symposium. Proceedings of the 3rd MARC Symposium, 2011

RDTS: A Reliable Erasure-Coding Based Data Transfer Scheme for Wireless Sensor Networks.

[BibT_eX]

[DOI]

M. Sammer Srouji

Proceedings of the 17th IEEE International Conference on Parallel and Distributed Systems, 2011

A multi-level dynamic complexity reduction scheme for multiview video coding.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE International Conference on Image Processing, 2011

A high-throughput parallel hardware architecture for H.264/AVC CAVLC encoding.

[BibT_eX]

[DOI]

Adnan Orcun Tüfek

Proceedings of the 18th IEEE International Conference on Image Processing, 2011

Revc: Computationally Reliable Video Coding on unreliable hardware platforms: A case study on error-tolerant H.264/AVC CAVLC entropy coding.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE International Conference on Image Processing, 2011

A low-power memory architecture with application-aware power management for motion & disparity estimation in Multiview Video Coding.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

System-level application-aware dynamic power management in adaptive pipelined MPSoCs for multimedia.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

Run-Time Resource Allocation for Simultaneous Multi-tasking in Multi-core Reconfigurable Processors.

[BibT_eX]

[DOI]

Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

Multi-level pipelined parallel hardware architecture for high throughput motion and disparity estimation in Multiview Video Coding.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2011

Minority-Game-based resource allocation for run-time reconfigurable multi-core processors.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2011

CARAT: Context-aware runtime adaptive task migration for multi core architectures.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2011

Dynamic thermal management in 3D multi-core architecture through run-time adaptation.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2011

mRTS: Run-time system for reconfigurable processors with multi-grained instruction-set extensions.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2011

Run-time adaptive energy-aware motion and disparity estimation in multiview video coding.

[BibT_eX]

[DOI]

Felipe Sampaio

Proceedings of the 48th Design Automation Conference, 2011

Low-power adaptive pipelined MPSoCs for multimedia: an H.264 video encoder case study.

[BibT_eX]

[DOI]

Proceedings of the 48th Design Automation Conference, 2011

SEAL: soft error aware low power scheduling by Monte Carlo state space under the influence of stochastic spatial and temporal dependencies.

[BibT_eX]

[DOI]

Muhammad Adnan Siddique

Proceedings of the 48th Design Automation Conference, 2011

Reliable software for unreliable hardware: embedded code generation aiming at reliability.

[BibT_eX]

[DOI]

Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, 2011

DistRM: distributed resource management for on-chip many-core systems.

[BibT_eX]

[DOI]

Sebastian Kobbe

Daniel Lohmann

Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, 2011

Design and architectures for dependable embedded systems.

[BibT_eX]

[DOI]

Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, 2011

Economic learning for thermal-aware power budgeting in many-core architectures.

[BibT_eX]

[DOI]

Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, 2011

Adaptive resource management for simultaneous multitasking in mixed-grained reconfigurable multi-core processors.

[BibT_eX]

[DOI]

Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, 2011

A heterogeneous SoC architecture with embedded virtual FPGA cores and runtime Core Fusion.

[BibT_eX]

[DOI]

Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011

Concepts, architectures, and run-time systems for efficient and adaptive reconfigurable processors.

[BibT_eX]

[DOI]

Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011

Invasive Computing: An Overview.

[BibT_eX]

[DOI]

Jürgen Teich

Andreas Herkersdorf

Doris Schmitt-Landsiedel

Gregor Snelting

Proceedings of the Multiprocessor System-on-Chip - Hardware Design and Tool Integration., 2011

DodOrg - A Self-adaptive Organic Many-core Architecture.

[BibT_eX]

[DOI]

David Kramer

Christian Schuck

Alexander von Renteln

Proceedings of the Organic Computing - A Paradigm Shift for Complex Systems, 2011

Agent-Based Thermal Management for Multi-core Architectures.

[BibT_eX]

[DOI]

Proceedings of the Organic Computing - A Paradigm Shift for Complex Systems, 2011

Hardware/Software Architectures for Low-Power Embedded Multimedia Systems.

[BibT_eX]

[DOI]

Springer, ISBN: 978-1-4419-9691-6, 2011

Run-time Adaptation for Reconfigurable Embedded Processors.

[BibT_eX]

[DOI]

Springer, ISBN: 978-1-4419-7411-2, 2011

2010

Optimizing the H.264/AVC Video Encoder Application Structure for Reconfigurable and Application-Specific Platforms.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2010

Guest Editorial: Current Trends in Low-Power Design.

[BibT_eX]

[DOI]

Naehyuck Chang

ACM Trans. Design Autom. Electr. Syst., 2010

Call for papers ACM transactions on design automation of electronic systems (TODAES) special section on low-power electronics and design.

[BibT_eX]

[DOI]

Naehyuck Chang

ACM Trans. Design Autom. Electr. Syst., 2010

Huffman-based code compression techniques for embedded processors.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2010

Ultra-Low Power Signal Processing [DSP Forum].

[BibT_eX]

[DOI]

IEEE Signal Process. Mag., 2010

Runtime Thermal Management Using Software Agents for Multi- and Many-Core Architectures.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2010

CASES 2009 guest editor's introduction.

[BibT_eX]

[DOI]

Des. Autom. Embed. Syst., 2010

An adaptive early skip mode decision scheme for multiview video coding.

[BibT_eX]

[DOI]

Proceedings of the Picture Coding Symposium, 2010

Power-aware complexity-scalable multiview video coding for mobile devices.

[BibT_eX]

[DOI]

Proceedings of the Picture Coding Symposium, 2010

Selective instruction set muting for energy-aware adaptive processors.

[BibT_eX]

[DOI]

Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

SETS: Stochastic execution time scheduling for multicore systems by joint state space and Monte Carlo.

[BibT_eX]

[DOI]

Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

Message from the chairs.

[BibT_eX]

[DOI]

Proceedings of the 8th IEEE Workshop on Embedded Systems for Real-Time Multimedia, 2010

An HVS-based Adaptive Computational Complexity Reduction Scheme for H.264/AVC video encoder using Prognostic Early Mode Exclusion.

[BibT_eX]

[DOI]

Bastian Molkenthin

Proceedings of the Design, Automation and Test in Europe, 2010

enBudget: A Run-Time Adaptive Predictive Energy-Budgeting scheme for energy-aware Motion Estimation in H.264/MPEG-4 AVC video encoder.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2010

KAHRISMA: A novel Hypermorphic Reconfigurable-Instruction-Set Multi-grained-Array architecture.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2010

DAGS: Distribution agnostic sequential Monte Carlo scheme for task execution time estimation.

[BibT_eX]

[DOI]

Muhammad Adnan Siddique

Proceedings of the Design, Automation and Test in Europe, 2010

RMOT: Recursion in model order for task execution time estimation in a software pipeline.

[BibT_eX]

[DOI]

Muhammad Adnan Siddique

Proceedings of the Design, Automation and Test in Europe, 2010

NeuroNoC: neural network inspired runtime adaptation for an on-chip communication architecture.

[BibT_eX]

[DOI]

Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, 2010

2009

Security and Dependability of Embedded Systems: A Computer Architects' Perspective.

[BibT_eX]

[DOI]

Vijaykrishnan Narayanan

Roshan G. Ragel

Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009

Non-linear rate control for H.264/AVC video encoder with multiple picture types using image-statistics and motion-based Macroblock Prioritization.

[BibT_eX]

[DOI]

Bastian Molkenthin

Proceedings of the International Conference on Image Processing, 2009

REMiS: Run-time energy minimization scheme in a reconfigurable processor with dynamic power-gated instruction set.

[BibT_eX]

[DOI]

Proceedings of the 2009 International Conference on Computer-Aided Design, 2009

TAPE: Thermal-aware agent-based power econom multi/many-core architectures.

[BibT_eX]

[DOI]

Proceedings of the 2009 International Conference on Computer-Aided Design, 2009

RISPP: A run-time adaptive reconfigurable embedded processor.

[BibT_eX]

[DOI]

Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

A parallel approach for high performance hardware design of intra prediction in H.264/AVC Video Codec.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2009

Efficient constant-time entropy decoding for H.264.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2009

Configurable links for runtime adaptive on-chip communication.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2009

Cross-architectural design space exploration tool for reconfigurable processors.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2009

LICT: left-uncompressed instructions compression technique to improve the decoding performance of VLIW processors.

[BibT_eX]

[DOI]

Proceedings of the 46th Design Automation Conference, 2009

MinDeg: a performance-guided replacement policy for run-time reconfigurable accelerators.

[BibT_eX]

[DOI]

Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, 2009

2008

Guest Editorial Special Section on Low-Power Electronics and Design.

[BibT_eX]

[DOI]

Diana Marculescu

IEEE Trans. Very Large Scale Integr. Syst., 2008

Efficient Code Compression for Embedded Processors.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2008

Efficient Resource Utilization for an Extensible Processor Through Dynamic Instruction Set Adaptation.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2008

A Flexible Framework for Communication Evaluation in SoC Design.

[BibT_eX]

[DOI]

Int. J. Parallel Program., 2008

QoS-supported On-chip Communication for Multi-processors.

[BibT_eX]

[DOI]

Int. J. Parallel Program., 2008

Dependability and Security Will Change Embedded Computing.

[BibT_eX]

[DOI]

Dimitrios N. Serpanos

Computer, 2008

3-tier dynamically adaptive power-aware motion estimator for h.264/AVC video encoding.

[BibT_eX]

[DOI]

Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008

ROAdNoC: runtime observability for an adaptive network on chip architecture.

[BibT_eX]

[DOI]

Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

FBT: filled buffer technique to reduce code size for VLIW processors.

[BibT_eX]

[DOI]

Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

A computation- and communication- infrastructure for modular special instructions in a dynamically reconfigurable processor.

[BibT_eX]

[DOI]

Proceedings of the FPL 2008, 2008

Minimizing Virtual Channel Buffer for Routers in On-chip Communication Architectures.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2008

Instruction Re-encoding Facilitating Dense Embedded Code.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2008

Run-time System for an Extensible Embedded Processor with Dynamic Instruction Set.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2008

ADAM: run-time agent-based distributed application mapping for on-chip communication.

[BibT_eX]

[DOI]

Rudolf Krist

Proceedings of the 45th Design Automation Conference, 2008

Run-time instruction set selection in a transmutable embedded processor.

[BibT_eX]

[DOI]

Proceedings of the 45th Design Automation Conference, 2008

Block cache for embedded systems.

[BibT_eX]

[DOI]

Dominic Hillenbrand

Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

2007

A Self-Adaptive Extensible Embedded Processor.

[BibT_eX]

[DOI]

Proceedings of the First International Conference on Self-Adaptive and Self-Organizing Systems, 2007

Run-time adaptive on-chip communication scheme.

[BibT_eX]

[DOI]

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

An Optimized Application Architecture of the H.264 Video Encoder for Application Specific Platforms.

[BibT_eX]

[DOI]

Proceedings of the 2007 5th Workshop on Embedded Systems for Real-Time Multimedia, 2007

Instruction trace compression for rapid instruction cache simulation.

[BibT_eX]

[DOI]

Andhi Janapsatya

Aleksandar Ignjatovic

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Efficient code density through look-up table compression.

[BibT_eX]

[DOI]

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Instruction Splitting for Efficient Code Compression.

[BibT_eX]

[DOI]

Proceedings of the 44th Design Automation Conference, 2007

RISPP: Rotating Instruction Set Processing Platform.

[BibT_eX]

[DOI]

Proceedings of the 44th Design Automation Conference, 2007

Transaction Specific Virtual Channel Allocation in QoS Supported On-chip Communication.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Application-Specific Systems, 2007

2006

Distance-based recent use (DRU): an enhancement to instruction cache replacement policies for transition energy reduction.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2006

A design methodology for application-specific networks-on-chip.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2006

Using Shiftable Content Addressable Memories to Double Memory Capacity on Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

Using Lin-Kernighan algorithm for look-up table compression to improve code density.

[BibT_eX]

[DOI]

Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

Bounded arbitration algorithm for QoS-supported on-chip communication.

[BibT_eX]

[DOI]

Gereon Weiss

Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006

Digital On-Demand Computing Organism for Real-Time Systems.

[BibT_eX]

[DOI]

Proceedings of the ARCS 2006, 2006

2005

Instruction code mapping for performance increase and energy reduction in embedded computer systems.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2005

Approximate arithmetic coding for bus transition reduction in low power designs.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2005

Hardware/software codesign for DSP (from the Guest Editor).

[BibT_eX]

[DOI]

Shuvra S. Bhattacharyya

IEEE Signal Process. Mag., 2005

A Methodology for Architectural Design of Multimedia Multiprocessor SoCs.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2005

A Unified Architecture for Adaptive Compression of Data and Code on Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

A methodology for design, modeling, and analysis of networks-on-chip.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

H.264 HDTV Decoder Using Application-Specific Networks-On-Chip.

[BibT_eX]

[DOI]

Proceedings of the 2005 IEEE International Conference on Multimedia and Expo, 2005

Battery-aware instruction generation for embedded processors.

[BibT_eX]

[DOI]

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

Cypress: Compression and Encryption of Data and Code for Embedded Multimedia Systems.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2004

On-chip networks: A scalable, communication-centric embedded system design paradigm.

[BibT_eX]

[DOI]

Srimat T. Chakradhar

Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

A quantitative study and estimation models for extensible instructions in embedded processors.

[BibT_eX]

[DOI]

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

A Case Study in Networks-on-Chip Design for Embedded Video.

[BibT_eX]

[DOI]

Proceedings of the 2004 Design, 2004

Distributed Multimedia System Design: A Holistic Perspective.

[BibT_eX]

[DOI]

Radu Marculescu

Massoud Pedram

Proceedings of the 2004 Design, 2004

MINCE: Matching INstructions Using Combinational Equivalence for Extensible Processor.

[BibT_eX]

[DOI]

Proceedings of the 2004 Design, 2004

2003

A dictionary-based en/decoding scheme for low-power data buses.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2003

An Overview of Rapid System Prototyping Today.

[BibT_eX]

[DOI]

Fabrice Kordon

Des. Autom. Embed. Syst., 2003

Guest Editors' Introduction: Taking on the Embedded System Design Challenge.

[BibT_eX]

[DOI]

Xiaobo Hu

Shuvra S. Bhattacharyya

Computer, 2003

Closing the SoC Design Gap.

[BibT_eX]

[DOI]

Computer, 2003

Specification and Design of Multi-Million Gate SOCs.

[BibT_eX]

[DOI]

Loganath Ramachandran

Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

LRU-SEQ: A Novel Replacement Policy for Transition Energy Reduction in Instruction Caches.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

INSIDE: INstruction Selection/Identification & Design Exploration for Extensible Processors.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

Enhancing Signal Integrity through a Low-Overhead Encoding Scheme on Address Buses.

[BibT_eX]

[DOI]

Proceedings of the 2003 Design, 2003

Rapid Configuration and Instruction Selection for an ASIP: A Case Study.

[BibT_eX]

[DOI]

Proceedings of the 2003 Design, 2003

CoCo: a hardware/software platform for rapid prototyping of code compression technologies.

[BibT_eX]

[DOI]

Proceedings of the 40th Design Automation Conference, 2003

Multi-parametric improvements for embedded systems using code-placement and address bus coding.

[BibT_eX]

[DOI]

Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

SEA: fast power estimation for micro-architectures.

[BibT_eX]

[DOI]

Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

Rapid Configuration & Instruction Selection for an ASIP: A Case Study.

[BibT_eX]

[DOI]

Proceedings of the Embedded Software for SoC, 2003

2002

Avalanche: an environment for design space exploration and optimization of low-power embedded systems.

[BibT_eX]

[DOI]

Yanbing Li

IEEE Trans. Very Large Scale Integr. Syst., 2002

Instruction-based system-level power evaluation of system-on-a-chip peripheral cores.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2002

System-level exploration for Pareto-optimal configurations in parameterized system-on-a-chip.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2002

ETAM++: Extended Transition Activity Measure for Low Power Address Bus Designs.

[BibT_eX]

[DOI]

Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002

An Adaptive Dictionary Encoding Scheme for SOC Data Buses.

[BibT_eX]

[DOI]

Proceedings of the 2002 Design, 2002

Dynamic Runtime Re-Scheduling Allowing Multiple Implementations of a Task for Platform-Based Designs.

[BibT_eX]

[DOI]

Tin-Man Lee

Proceedings of the 2002 Design, 2002

Design of an one-cycle decompression hardware for performance increase in embedded systems.

[BibT_eX]

[DOI]

Venkata Jakkula

Proceedings of the 39th Design Automation Conference, 2002

1-cycle code decompression circuitry for performance increase of Xtensa-1040-based embedded systems.

[BibT_eX]

[DOI]

Venkata Jakkula

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

2001

An approach to automated hardware/software partitioning using a flexible granularity that is driven by high-level estimation techniques.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2001

Evaluating power consumption of parameterized cache and bus architectures in system-on-a-chip designs.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2001

Design and simulation of a pipelined decompression architecture for embedded systems.

[BibT_eX]

[DOI]

Proceedings of the 14th International Symposium on Systems Synthesis, 2001

I-CoPES: Fast Instruction Code Placement for Embedded Systems to Improve Performance and Energy Efficiency.

[BibT_eX]

[DOI]

Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

System-Level Exploration for Pareto-Optimal Configurations in Parameterized Systems-on-a-Chip.

[BibT_eX]

[DOI]

Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

A2BC: Adaptive Address Bus Coding for Low Power Deep Sub-Micron Designs.

[BibT_eX]

[DOI]

Proceedings of the 38th Design Automation Conference, 2001

Trace-driven system-level power evaluation of system-on-a-chip peripheral cores.

[BibT_eX]

[DOI]

Proceedings of ASP-DAC 2001, 2001

2000

A Decompression Architecture for Low Power Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

Arithmetic Coding for Low Power Embedded System Design.

[BibT_eX]

[DOI]

Proceedings of the Data Compression Conference, 2000

Fast Cache and Bus Power Estimation for Parameterized System-on-a-Chip Design.

[BibT_eX]

[DOI]

Proceedings of the 2000 Design, 2000

Code compression for low power embedded system design.

[BibT_eX]

[DOI]

Proceedings of the 37th Conference on Design Automation, 2000

Code compression as a variable in hardware/software co-design.

[BibT_eX]

[DOI]

Proceedings of the Eighth International Workshop on Hardware/Software Codesign, 2000

A hybrid approach for core-based system-level power modeling.

[BibT_eX]

[DOI]

Proceedings of ASP-DAC 2000, 2000

1999

Interface and cache power exploration for core-based embedded system design.

[BibT_eX]

[DOI]

Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

A Methodology for Minimizing Power Dissipation of Embedded Systems through Hardware/Software Partitioning.

[BibT_eX]

[DOI]

Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999

A Low Power Hardware/Software Partitioning Approach for Core-Based Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the 36th Conference on Design Automation, 1999

1998

A Framework for Estimation and Minimizing Energy Dissipation of Embedded HW/SW Systems.

[BibT_eX]

[DOI]

Yanbing Li

Proceedings of the 35th Conference on Design Automation, 1998

Energy-conscious HW/SW-partitioning of embedded systems: a case study on an MPEG-2 encoder.

[BibT_eX]

[DOI]

Yanbing Li

Proceedings of the Sixth International Workshop on Hardware/Software Codesign, 1998

High-Level Estimation Techniques for Usage in Hardware/Software Co-Design.

[BibT_eX]

[DOI]

Proceedings of the ASP-DAC '98, 1998

1997

A Hardware/Software Partitioner Using a Dynamically Determined Granularity.

[BibT_eX]

[DOI]

Proceedings of the 34st Conference on Design Automation, 1997

1996

Automatisierte Hardware-Software-Partitionierung im Entwurf integrierter Echtzeitsysteme.

[BibT_eX]

[DOI]

PhD thesis, 1996

The COSYMA environment for hardware/software cosynthesis of small embedded systems.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 1996

The Interplay of Run-Time Estimation and Granularity in HW/SW Partitioning.

[BibT_eX]

[DOI]

Proceedings of the Forth International Workshop on Hardware/Software Codesign, 1996

1995

A path-based technique for estimating hardware runtime in HW/SW-cosynthesis.

[BibT_eX]

[DOI]

Proceedings of the 8th International Symposium on System Synthesis (ISSS 1995), 1995

1994

Adaptation of partitioning and high-level synthesis in hardware/software co-synthesis.

[BibT_eX]

[DOI]

Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

An approach to the adaptation of estimated cost parameters in the COSYMA system.

[BibT_eX]

[DOI]

Dirk Herrmann

Proceedings of the Third International Workshop on Hardware/Software Codesign, 1994

1993

Hardware-Software Cosynthesis for Microcontrollers.

[BibT_eX]

[DOI]