Sanjive Agarwala

According to our database1, Sanjive Agarwala authored at least 10 papers between 1988 and 2020.

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Bibliography

2020
2.6 A 16nm 3.5B+ Transistor >14TOPS 2-to-10W Multicore SoC Platform for Automotive and Embedded Applications with Integrated Safety MCU, 512b Vector VLIW DSP, Embedded Vision and Imaging Acceleration.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2012

2007

2004

2002
A 600-MHz VLIW DSP.
IEEE J. Solid State Circuits, 2002

2000
A Scalable High-Performance DMA Architecture for DSP Applications.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

Effective Hardware-Based Two-Way Loop Cache for High Performance Low Power Processors.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

A Multi-Level Memory System Architecture for High-Performance DSP Applications.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

1994
A Linear Time Algorithm for Timing Directed Circuit Optimizations.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1988
ZEITGEIST: Database Support for Object-Oriented Programming.
Proceedings of the Advances in Object-Oriented Database Systems, 1988


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