Scott Kaylor

According to our database, Scott Kaylor authored at least 6 papers between 1996 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2016

A 14-bit 8.9GS/s RF DAC in 40nm CMOS achieving >71dBc LTE ACPR at 2.9GHz.

Vishnu Ravinuthula, William Bright, Mark Weaver, Kenneth Maclean, Scott Kaylor, Sidharth Balasubramanian, Jesse Coulon, Robert Keller, Bao Nguyen, Ebenezer Dwobeng

Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

9.1 A 45nm CMOS RF-to-Bits LTE/WCDMA FDD/TDD 2×2 MIMO base-station transceiver SoC with 200MHz RF bandwidth.

Nikolaus Klemmer, S. Akhtar, V. Srinivasan, P. Litmanen, Himanshu Arora, Satish Uppathil, Scott Kaylor, A. Akour, V. Wang, M. Fares, F. Dulger, A. Frank, D. Ghosh, S. Madhavapeddi, H. Safiri, J. Mehta, A. Jain, H. Choo, E. Zhang, Charles K. Sestok, C. Fernando, Rajagopal K. A., S. Ramakrishnan, V. Sinari, V. Baireddy

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2014

A 12 Bit 1.6 GS/s BiCMOS 2×2 Hierarchical Time-Interleaved Pipeline ADC.

Manar El-Chammas, Xiaopeng Li, Shigenobu Kimura, Kenneth Maclean, Jake Hu, Mark Weaver, Matthew Gindlesperger, Scott Kaylor, Robert Payne, Charles K. Sestok, William Bright

IEEE J. Solid State Circuits, 2014

2010

A 16-Bit 100 to 160 MS/s SiGe BiCMOS Pipelined ADC With 100 dBFS SFDR.

Robert Payne, Marco Corsi, David Smith, Tien-Ling Hsieh, Scott Kaylor

IEEE J. Solid State Circuits, 2010

A 16b 100-to-160MS/s SiGe BiCMOS pipelined ADC with 100dBFS SFDR.

Robert Payne, Marco Corsi, David Smith, Scott Kaylor, Daniel Hsieh

Proceedings of the IEEE International Solid-State Circuits Conference, 2010

1996

A PRML read/write channel IC using analog signal processing for 200 Mb/s HDD.

Kavch Parsi, Robert P. Burns, Alan Chaiken, Mark Chambers, William R. Forni, David Harnishfeger, Scott Kaylor, Micheal J. Pennell, Jose O. Perez, Narendra Rao, Mark Rohrhaugh, Mike Ross, Gary L. Stuhlmiller

IEEE J. Solid State Circuits, 1996