Sebastien Barasinski

According to our database1, Sebastien Barasinski authored at least 2 papers between 2008 and 2009.

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Bibliography

2009
Product On-Chip Process Compensation for Low Power and Yield Enhancement.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2009

2008
A 45nm single power supply SRAM supporting low voltage operation down to 0.6V.
Proceedings of the ESSCIRC 2008, 2008


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