Seryeong Kim

Orcid: 0009-0009-9846-894X

According to our database1, Seryeong Kim authored at least 15 papers between 2023 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
IRIS: An Energy-Efficient Spatial Computing SoC for Real-Time Interactive Rendering and Modeling With Surface-Aware 3-D Gaussian Splatting.
IEEE J. Solid State Circuits, January, 2026

A 198.7 μJ/token Block Diffusion LLM Processor with Mask Token Similarity-Based Activation Reuse.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

COOL-Splat: A HW/SW Co-optimized Online 3D Gaussian Splatting Modeling Accelerator for Energy-Efficient 3D Modeling on Mobile Devices.
Proceedings of the IEEE Symposium on Low-Power and High-Speed Chips and Systems, 2026

A Real-Time and Energy-Efficient 3D Gaussian Splatting-based Geometric and Semantic Mapping Processor with 2-level Redundancy Handling for Embodied Agents.
Proceedings of the IEEE Symposium on Low-Power and High-Speed Chips and Systems, 2026

MicroXPU: An Energy-Efficient Low-bit LLM Accelerator with Microscaling Format-Tailored Digital Compute-in-Memory Macro.
Proceedings of the IEEE Symposium on Low-Power and High-Speed Chips and Systems, 2026

2025
A 227.1 TOPS/W High Energy-Efficiency PNN-Based 3-D Object Recognition Processor With Spiking Neural Network for Edge Device.
IEEE Trans. Circuits Syst. II Express Briefs, November, 2025

NeRF-Navi: An Energy-Efficient NeRF 3-D Path Planning Processor With Reconfigurable Approximate/Accurate Bit Offloading Core.
IEEE J. Solid State Circuits, November, 2025

IRIS: A 8.55mJ/frame Spatial Computing SoC for Interactable Rendering and Surface-Aware Modeling with 3D Gaussian Splatting.
Proceedings of the IEEE International Solid-State Circuits Conference, 2025

A 51.2 fps Real-Time 3DGS-SLAM Accelerator using Diagonal Feeding with Symmetric Alpha Reuse and Voxel-based 3D Gaussian Cache Management.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

IRIS: A 8.55 mJ/frame Spatial Computing SoC for Real-time Interactable-Rendering and Surface-aware-Modeling with 3D Gaussian Splatting.
Proceedings of the IEEE Hot Chips 37 Symposium, 2025

A Real-Time 3DGS-SLAM with Voxel-based Memory Management and Region of Interest-based Pixel-wise Skipping Architecture on Edge Device.
Proceedings of the 7th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2025

2024
An Energy-Efficient CNN/Transformer Hybrid Neural Semantic Segmentation Processor With Chunk-Based Bit Plane Data Compression and Similarity-Based Token-Level Skipping Exploitation.
IEEE Trans. Circuits Syst. I Regul. Pap., December, 2024

NeRF-Navi: A 93.6-202.9µJ/task Switchable Approximate-Accurate NeRF Path Planning Processor with Dual Attention Engine and Outlier Bit-Offloading Core.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

A 3.55 mJ/frame Energy-efficient Mixed-Transformer based Semantic Segmentation Accelerator for Mobile Devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023
A Reconfigurable 1T1C eDRAM-based Spiking Neural Network Computing-In-Memory Processor for High System-Level Efficiency.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023


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