Seongyon Hong
Orcid: 0009-0002-8891-735X
According to our database1,
Seongyon Hong
authored at least 8 papers
between 2023 and 2024.
Collaborative distances:
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Bibliography
2024
C-DNN: An Energy-Efficient Complementary Deep-Neural-Network Processor With Heterogeneous CNN/SNN Core Architecture.
IEEE J. Solid State Circuits, January, 2024
A 28.6 mJ/iter Stable Diffusion Processor for Text-to-Image Generation with Patch Similarity-based Sparsity Augmentation and Text-based Mixed-Precision.
CoRR, 2024
20.5 C-Transformer: A 2.6-18.1μJ/Token Homogeneous DNN-Transformer/Spiking-Transformer Processor with Big-Little Network and Implicit Weight Generation for Large Language Models.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2023
C-DNN: A 24.5-85.8TOPS/W Complementary-Deep-Neural-Network Processor with Heterogeneous CNN/SNN Core Architecture and Forward-Gradient-Based Sparsity Generation.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
A 332 TOPS/W Input/Weight-Parallel Computing-in-Memory Processor with Voltage-Capacitance-Ratio Cell and Time-Based ADC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
COOL-NPU: Complementary Online Learning Neural Processing Unit with CNN-SNN Heterogeneous Core and Event-driven Backpropagation.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2023
LOG-CIM: A 116.4 TOPS/W Digital Computing-In-Memory Processor Supporting a Wide Range of Logarithmic Quantization with Zero-Aware 6T Dual-WL Cell.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023