Donghyeon Han
Orcid: 0000-0002-5212-2072
According to our database1,
Donghyeon Han
authored at least 62 papers
between 2018 and 2024.
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Collaborative distances:
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Bibliography
2024
DynaPlasia: An eDRAM In-Memory Computing-Based Reconfigurable Spatial Accelerator With Triple-Mode Cell.
IEEE J. Solid State Circuits, January, 2024
C-DNN: An Energy-Efficient Complementary Deep-Neural-Network Processor With Heterogeneous CNN/SNN Core Architecture.
IEEE J. Solid State Circuits, January, 2024
MetaVRain: A Mobile Neural 3-D Rendering Processor With Bundle-Frame-Familiarity-Based NeRF Acceleration and Hybrid DNN Computing.
IEEE J. Solid State Circuits, January, 2024
A Low-Power Artificial-Intelligence-Based 3-D Rendering Processor With Hybrid Deep Neural Network Computing.
IEEE Micro, 2024
20.7 NeuGPU: A 18.5mJ/Iter Neural-Graphics Processing Unit for Instant-Modeling and Real-Time Rendering with Segmented-Hashing Architecture.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
20.8 Space-Mate: A 303.5mW Real-Time Sparse Mixture-of-Experts-Based NeRF-SLAM Processor for Mobile Spatial Computing.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
20.6 LSPU: A Fully Integrated Real-Time LiDAR-SLAM SoC with Point-Neural-Network Segmentation and Multi-Level kNN Acceleration.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2023
An Efficient Deep-Learning-Based Super-Resolution Accelerating SoC With Heterogeneous Accelerating and Hierarchical Cache.
IEEE J. Solid State Circuits, March, 2023
A Mobile 3-D Object Recognition Processor With Deep-Learning-Based Monocular Depth Estimation.
IEEE Micro, 2023
DSPU: An Efficient Deep Learning-Based Dense RGB-D Data Acquisition With Sensor Fusion and 3-D Perception SoC.
IEEE J. Solid State Circuits, 2023
GPPU: A 330.4-μJ/ task Neural Path Planning Processor with Hybrid GNN Acceleration for Autonomous 3D Navigation.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
NeRPIM: A 4.2 mJ/frame Neural Rendering Processing-in-memory Processor with Space Encoding Block-wise Mapping for Mobile Devices.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
DynaPlasia: An eDRAM In-Memory-Computing-Based Reconfigurable Spatial Accelerator with Triple-Mode Cell for Dynamic Resource Switching.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
C-DNN: A 24.5-85.8TOPS/W Complementary-Deep-Neural-Network Processor with Heterogeneous CNN/SNN Core Architecture and Forward-Gradient-Based Sparsity Generation.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
MetaVRain: A 133mW Real-Time Hyper-Realistic 3D-NeRF Processor with 1D-2D Hybrid-Neural Engines for Metaverse on Mobile Devices.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
COOL-NPU: Complementary Online Learning Neural Processing Unit with CNN-SNN Heterogeneous Core and Event-driven Backpropagation.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2023
A Low-power Neural 3D Rendering Processor with Bio-inspired Visual Perception Core and Hybrid DNN Acceleration.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2023
A 33.6 FPS Embedding based Real-time Neural Rendering Accelerator with Switchable Computation Skipping Architecture on Edge Device.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023
2022
A 49.5 mW Multi-Scale Linear Quantized Online Learning Processor for Real-Time Adaptive Object Detection.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
A 36.2 dB High SNR and PVT/Leakage-Robust eDRAM Computing-In-Memory Macro With Segmented BL and Reference Cell Array.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
TSUNAMI: Triple Sparsity-Aware Ultra Energy-Efficient Neural Network Training Accelerator With Multi-Modal Iterative Pruning.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
A Mobile DNN Training Processor With Automatic Bit Precision Search and Fine-Grained Sparsity Exploitation.
IEEE Micro, 2022
OmniDRL: An Energy-Efficient Deep Reinforcement Learning Processor With Dual-Mode Weight Compression and Sparse Weight Transposer.
IEEE J. Solid State Circuits, 2022
A Pipelined Point Cloud Based Neural Network Processor for 3-D Vision With Large-Scale Max Pooling Layer Prediction.
IEEE J. Solid State Circuits, 2022
DSPU: A 281.6mW Real-Time Depth Signal Processing Unit for Deep Learning-Based Dense RGB-D Data Acquisition with Depth Fusion and 3D Bounding Box Extraction in Mobile Platforms.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
An Efficient High-quality FHD Super-resolution Mobile Accelerator SoC with Hybrid-precision and Energy-efficient Cache.
Proceedings of the 2022 IEEE Hot Chips 34 Symposium, 2022
DSPU: A 281.6mW Real-Time Deep Learning-Based Dense RGB-D Data Acquisition with Sensor Fusion and 3D Perception System-on-Chip.
Proceedings of the 2022 IEEE Hot Chips 34 Symposium, 2022
HNPU-V2: A 46.6 FPS DNN Training Processor for Real-World Environmental Adaptation based Robust Object Detection on Mobile Devices.
Proceedings of the 2022 IEEE Hot Chips 34 Symposium, 2022
A Low-power and Real-time 3D Object Recognition Processor with Dense RGB-D Data Acquisition in Mobile Platforms.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2022
An 0.92 mJ/frame High-quality FHD Super-resolution Mobile Accelerator SoC with Hybrid-precision and Energy-efficient Cache.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022
A DNN Training Processor for Robust Object Detection with Real-World Environmental Adaptation.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
A 0.95 mJ/frame DNN Training Processor for Robust Object Detection with Real-World Environmental Adaptation.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022
2021
A 64.1mW Accurate Real-Time Visual Object Tracking Processor With Spatial Early Stopping on Siamese Network.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
An Energy-Efficient GAN Accelerator With On-Chip Training for Domain-Specific Optimization.
IEEE J. Solid State Circuits, 2021
GANPU: An Energy-Efficient Multi-DNN Training Processor for GANs With Speculative Dual-Sparsity Exploitation.
IEEE J. Solid State Circuits, 2021
DF-LNPU: A Pipelined Direct Feedback Alignment-Based Deep Neural Network Learning Processor for Fast Online Learning.
IEEE J. Solid State Circuits, 2021
HNPU: An Adaptive DNN Training Processor Utilizing Stochastic Dynamic Fixed-Point and Active Bit-Precision Searching.
IEEE J. Solid State Circuits, 2021
An Overview of Sparsity Exploitation in CNNs for On-Device Intelligence With Software-Hardware Cross-Layer Optimizations.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2021
OmniDRL: A 29.3 TFLOPS/W Deep Reinforcement Learning Processor with Dualmode Weight Compression and On-chip Sparse Weight Transposer.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
OmniDRL: An Energy-Efficient Mobile Deep Reinforcement Learning Accelerators with Dual-mode Weight Compression and Direct Processing of Compressed Data.
Proceedings of the IEEE Hot Chips 33 Symposium, 2021
An Energy-efficient Floating-Point DNN Processor using Heterogeneous Computing Architecture with Exponent-Computing-in-Memory.
Proceedings of the IEEE Hot Chips 33 Symposium, 2021
An Energy-Efficient Deep Neural Network Training Processor with Bit-Slice-Level Reconfigurability and Sparsity Exploitation.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2021
FlashMAC: An Energy-Efficient Analog-Digital Hybrid MAC with Variable Latency-Aware Scheduling.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021
Energy-Efficient Deep Reinforcement Learning Accelerator Designs for Mobile Autonomous Systems.
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021
2020
A 1.15 TOPS/W Energy-Efficient Capsule Network Accelerator for Real-Time 3D Point Cloud Segmentation in Mobile Environment.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
The Hardware and Algorithm Co-Design for Energy-Efficient DNN Processor on Edge/Mobile Devices.
IEEE Trans. Circuits Syst., 2020
A 0.22-0.89 mW Low-Power and Highly-Secure Always-On Face Recognition Processor With Adversarial Attack Prevention.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
DT-CNN: An Energy-Efficient Dilated and Transposed Convolutional Neural Network Processor for Region of Interest Based Image Segmentation.
IEEE Trans. Circuits Syst., 2020
Extension of Direct Feedback Alignment to Convolutional and Recurrent Neural Network for Bio-plausible Deep Learning.
CoRR, 2020
A 4.45 ms Low-Latency 3D Point-Cloud-Based Neural Network Processor for Hand Pose Estimation in Immersive Wearable Devices.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
7.4 GANPU: A 135TFLOPS/W Multi-DNN Training Processor for GANs with Speculative Dual-Sparsity Exploitation.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2019
A Low-Power Deep Neural Network Online Learning Processor for Real-Time Object Tracking Application.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
CNNP-v2: A Memory-Centric Architecture for Low-Power CNN Processor on Domain-Specific Mobile Devices.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2019
CoRR, 2019
A 1.32 TOPS/W Energy Efficient Deep Neural Network Learning Processor with Direct Feedback Alignment based Heterogeneous Core Architecture.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
LNPU: A 25.3TFLOPS/W Sparse Deep-Neural-Network Learning Processor with Fine-Grained Mixed Precision of FP8-FP16.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
DT-CNN: Dilated and Transposed Convolution Neural Network Accelerator for Real-Time Image Segmentation on Mobile Devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
Direct Feedback Alignment Based Convolutional Neural Network Training for Low-Power Online Learning Processor.
Proceedings of the 2019 IEEE/CVF International Conference on Computer Vision Workshops, 2019
CNNP-v2: An Energy Efficient Memory-Centric Convolutional Neural Network Processor Architecture.
Proceedings of the IEEE International Conference on Artificial Intelligence Circuits and Systems, 2019
2018
A Low-Power Convolutional Neural Network Face Recognition Processor and a CIS Integrated With Always-on Face Detector.
IEEE J. Solid State Circuits, 2018
A 141.4 mW Low-Power Online Deep Neural Network Training Processor for Real-time Object Tracking in Mobile Devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018