Shahrzad Keshavarz
Orcid: 0000-0002-1473-510X
According to our database1,
Shahrzad Keshavarz
authored at least 10 papers
between 2013 and 2019.
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Bibliography
2019
IEEE Trans. Very Large Scale Integr. Syst., 2019
2018
IEEE Trans. Very Large Scale Integr. Syst., 2018
Survey on Applications of Formal Methods in Reverse Engineering and Intellectual Property Protection.
J. Hardw. Syst. Secur., 2018
SAT-based reverse engineering of gate-level schematics using fault injection and probing.
Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018
2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
2016
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016
2014
Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014
2013
Proceedings of the East-West Design & Test Symposium, 2013