Lesley Shannon

Orcid: 0000-0002-7050-6184

According to our database1, Lesley Shannon authored at least 70 papers between 2003 and 2023.

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Bibliography

2023
A Cycle-Accurate Soft Error Vulnerability Analysis Framework for FPGA-based Designs.
CoRR, 2023

Unraveling the Integration of Deep Machine Learning in FPGA CAD Flow: A Concise Survey and Future Insights.
CoRR, 2023

Designing a configurable IEEE-compliant FPU that supports variable precision for soft processors.
Proceedings of the 31st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2023

2022
Introduction to Special Section on FPGA 2020.
ACM Trans. Reconfigurable Technol. Syst., 2022

Quick-Div: Rethinking Integer Divider Design for FPGA-based Soft-processors.
ACM Trans. Reconfigurable Technol. Syst., 2022

Demystifying the Soft and Hardened Memory Systems of Modern FPGAs for Software Programmers through Microbenchmarking.
ACM Trans. Reconfigurable Technol. Syst., 2022

Stealthy Attack on Algorithmic-Protected DNNs via Smart Bit Flipping.
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

Blind Data Adversarial Bit-flip Attack against Deep Neural Networks.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

A Majority-based Approximate Adder for FPGAs.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

FitAct: Error Resilient Deep Neural Networks via Fine-Grained Post-Trainable Activation Functions.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021
FPGA Computing.
IEEE Micro, 2021

SeaPlace: Process Variation Aware Placement for Reliable Combinational Circuits against SETs and METs.
CoRR, 2021

BDFA: A Blind Data Adversarial Bit-flip Attack on Deep Neural Networks.
CoRR, 2021

MAPLE: A Machine Learning based Aging-Aware FPGA Architecture Exploration Framework.
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers through Microbenchmarking.
Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

LEAP: A Deep Learning based Aging-Aware Architecture Exploration Framework for FPGAs.
Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

2020
CHIP-KNN: A Configurable and High-Performance K-Nearest Neighbors Accelerator on Cloud FPGAs.
Proceedings of the International Conference on Field-Programmable Technology, 2020

Aadam: A Fast, Accurate, and Versatile Aging-Aware Cell Library Delay Model using Feed-Forward Neural Network.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Exploring Writeback Designs for Efficiently Leveraging Parallel-Execution Units in FPGA-Based Soft-Processors.
Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020

2019
Efficient PUF-Based Key Generation in FPGAs Using Per-Device Configuration.
IEEE Trans. Very Large Scale Integr. Syst., 2019

Revisiting Deep Learning Parallelism: Fine-Grained Inference Engine Utilizing Online Arithmetic.
Proceedings of the International Conference on Field-Programmable Technology, 2019

Rethinking Integer Divider Design for FPGA-Based Soft-Processors.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

2018
Modular Block-RAM-Based Longest-Prefix Match Ternary Content-Addressable Memories.
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

Evaluating the Performance Efficiency of a Soft-Processor, Variable-Length, Parallel-Execution-Unit Architecture for FPGAs Using the RISC-V ISA.
Proceedings of the 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2018

2017
TAIGA: A new RISC-V soft-processor framework enabling high performance CPU architectural features.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

Performance impacts and limitations of hardware memory access trace collection.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
Shared Memory Multicore MicroBlaze System with SMP Linux Support.
ACM Trans. Reconfigurable Technol. Syst., 2016

A multi-beam Scan Mode Synthetic Aperture Radar processor suitable for satellite operation.
Proceedings of the 27th IEEE International Conference on Application-specific Systems, 2016

Systems-on-Chip on FPGAs.
Proceedings of the FPGAs for Software Programmers, 2016

2015
Performance monitoring for multicore embedded computing systems on FPGAs.
CoRR, 2015

Design Space Exploration of L1 Data Caches for FPGA-Based Multiprocessor Systems.
Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

Technology Scaling in FPGAs: Trends in Applications and Architectures.
Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015

2014
Identifying and placing heterogeneously-sized cluster groupings based on FPGA placement data.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

A methodology for identifying and placing heterogeneous cluster groups based on placement proximity data (abstract only).
Proceedings of the 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2014

2013
Analyzing System-Level Information's Correlation to FPGA Placement.
ACM Trans. Reconfigurable Technol. Syst., 2013

Supergenes in a genetic algorithm for heterogeneous FPGA placement.
Proceedings of the IEEE Congress on Evolutionary Computation, 2013

2012
Guest Editorial: Field-Programmable Technology.
J. Signal Process. Syst., 2012

Hierarchical Benchmark Circuit Generation for FPGA Architecture Evaluation.
ACM Trans. Embed. Comput. Syst., 2012

Amoeba-Cache: Adaptive Blocks for Eliminating Waste in the Memory Hierarchy.
Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012

Minimizing the error: A study of the implementation of an Integer Split-Radix FFT on an FPGA for medical imaging.
Proceedings of the 2012 International Conference on Field-Programmable Technology, 2012

Polyblaze: From one to many bringing the microblaze into the multicore era with Linux SMP support.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

Bio-inspired walking: A FPGA multicore system for a legged robot.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

2011
Leveraging reconfigurability in the hardware/software codesign process.
ACM Trans. Reconfigurable Technol. Syst., 2011

FPGA Framework for Agent Systems Using Dynamic Partial Reconfiguration.
Proceedings of the Holonic and Multi-Agent Systems for Manufacturing, 2011

Exploring FPGA technology mapping for fracturable LUT minimization.
Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011

Scalable, High Performance Fourier Domain Optical Coherence Tomography: Why FPGAs and Not GPGPUs.
Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

FUSE: Front-End User Framework for O/S Abstraction of Hardware Accelerators.
Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

Evaluating the scalability of high-performance, Fourier-Domain Optical Coherence Tomography on GPGPUs and FPGAs.
Proceedings of the Conference Record of the Forty Fifth Asilomar Conference on Signals, 2011

2010
EuTOPIA: Facilitating Processor-Based DPR Systems for non-DPR Experts.
J. Next Gener. Inf. Technol., 2010

A configurable framework for investigating workload execution.
Proceedings of the International Conference on Field-Programmable Technology, 2010

Finding System-Level Information and Analyzing Its Correlation to FPGA Placement.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Predicting the performance of application-specific NoCs implemented on FPGAs.
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

Odin II - An Open-Source Verilog HDL Synthesis Tool for CAD Research.
Proceedings of the 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2010

Customizing controller instruction sets for application-specific architectures.
Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010

2008
A new flexible PR domain model to replace the fixed multi-PR region model for DPR systems.
Proceedings of the 2008 International Conference on Field-Programmable Technology, 2008

An on-chip testbed that emulates runtime traffic and reduces design verification time for FPGA designs.
Proceedings of the 2008 International Conference on Field-Programmable Technology, 2008

Facilitating Processor-Based DPR Systems for non-DPR Experts.
Proceedings of the 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2008

A multi-FPGA application-specific architecture for accelerating a floating point Fourier Integral Operator.
Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008

Extending the SIMPPL SoC architectural framework to support application-specific architectures on multi-FPGA platforms.
Proceedings of the 19th IEEE International Conference on Application-Specific Systems, 2008

2007
SIMPPL: An Adaptable SoC Framework Using a Programmable Controller IP Interface to Facilitate Design Reuse.
IEEE Trans. Very Large Scale Integr. Syst., 2007

Routability of Network Topologies in FPGAs.
IEEE Trans. Very Large Scale Integr. Syst., 2007

A Multiprocessor System-on-Chip Implementation of a Laser-based Transparency Meter on an FPGA.
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

2006
A System Design Methodology for Reducing System Integration Time and Facilitating Modular Design Verification.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

The routability of multiprocessor network topologies in FPGAs.
Proceedings of the ACM/SIGDA 14th International Symposium on Field Programmable Gate Arrays, 2006

2005
Designing an FPGA SoC Using a Standardized IP Block Interface.
Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, 2005

Leveraging Reconfigurability in the Design Process.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Simplifying the Integration of Processing Elements in Computing Systems Using a Programmable Controller.
Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005

2004
Maximizing system performance: using reconfigurability to monitor system communications.
Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

Using reconfigurability to achieve real-time profiling for hardware/software codesign.
Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004

2003
Standardizing the Performance Assessment of Reconfigurable Processor Architectures.
Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003


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