Siva Nishok Dhanuskodi

Orcid: 0000-0002-2836-8929

According to our database1, Siva Nishok Dhanuskodi authored at least 11 papers between 2014 and 2023.

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Bibliography

2023
A Secure Design Methodology to Prevent Targeted Trojan Insertion during Fabrication.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023

2020
Efficient Register Renaming Architectures for 8-bit AES Datapath at 0.55 pJ/bit in 16-nm FinFET.
IEEE Trans. Very Large Scale Integr. Syst., 2020

Techniques to Reduce Switching and Leakage Energy in Unrolled Block Ciphers.
IEEE Trans. Computers, 2020

COUNTERFOIL: Verifying Provenance of Integrated Circuits using Intrinsic Package Fingerprints and Inexpensive Cameras.
Proceedings of the 29th USENIX Security Symposium, 2020

2019
Enabling Microarchitectural Randomization in Serialized AES Implementations to Mitigate Side Channel Susceptibility.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

2018
FPGA Side Channel Attacks without Physical Access.
Proceedings of the 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2018

2017
An improved clocking methodology for energy efficient low area AES architectures using register renaming.
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017

2016
Energy Optimization of Unrolled Block Ciphers using Combinational Checkpointing.
IACR Cryptol. ePrint Arch., 2016

LLPA: Logic State Based Leakage Power Analysis.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

2014
On Manufacturing Aware Physical Design to Improve the Uniqueness of Silicon-Based Physically Unclonable Functions.
Proceedings of the 2014 27th International Conference on VLSI Design, 2014

A Chaotic Ring oscillator based Random Number Generator.
Proceedings of the 2014 IEEE International Symposium on Hardware-Oriented Security and Trust, 2014


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