Shang Liu

According to our database, Shang Liu authored at least 12 papers between 2023 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

RTLCoder: Fully Open-Source and Efficient LLM-Assisted RTL Code Generation Technique.

Shang Liu, Wenji Fang, Yao Lu, Jing Wang, Qijun Zhang, Hongce Zhang, Zhiyao Xie

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2025

NetTAG: A Multimodal RTL-and-Layout-Aligned Netlist Foundation Model via Text-Attributed Graph.

Wenji Fang, Wenkai Li, Shang Liu, Yao Lu, Hongce Zhang, Zhiyao Xie

CoRR, April, 2025

Transferable Presynthesis PPA Estimation for RTL Designs With Data Augmentation Techniques.

Wenji Fang, Yao Lu, Shang Liu, Qijun Zhang, Ceyu Xu, Lisa Wu Wills, Hongce Zhang, Zhiyao Xie

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2025

Towards Big Data in AI for EDA Research: Generation of New Pseudo Circuits at RTL Stage.

Shang Liu, Wenji Fang, Yao Lu, Qijun Zhang, Zhiyao Xie

Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

A Self-Supervised, Pre-Trained, and Cross-Stage-Aligned Circuit Encoder Provides a Foundation for Various Design Tasks.

Wenji Fang, Shang Liu, Hongce Zhang, Zhiyao Xie

Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

AssertLLM: Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs.

Zhiyuan Yan, Wenji Fang, Mengming Li, Min Li, Shang Liu, Zhiyao Xie, Hongce Zhang

Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

2024

AssertLLM: Generating and Evaluating Hardware Verification Assertions from Design Specifications via Multi-LLMs.

Wenji Fang, Mengming Li, Min Li, Zhiyuan Yan, Shang Liu, Hongce Zhang, Zhiyao Xie

CoRR, 2024

OpenLLM-RTL: Open Dataset and Benchmark for LLM-Aided Design RTL Generation.

Shang Liu, Yao Lu, Wenji Fang, Mengming Li, Zhiyao Xie

Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024

Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimization.

Wenji Fang, Shang Liu, Hongce Zhang, Zhiyao Xie

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

RTLLM: An Open-Source Benchmark for Design RTL Generation with Large Language Model.

Yao Lu, Shang Liu, Qijun Zhang, Zhiyao Xie

Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023

RTLCoder: Outperforming GPT-3.5 in Design RTL Generation with Our Open-Source Dataset and Lightweight Solution.

Shang Liu, Wenji Fang, Yao Lu, Qijun Zhang, Hongce Zhang, Zhiyao Xie

CoRR, 2023

MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design.

Wenji Fang, Yao Lu, Shang Liu, Qijun Zhang, Ceyu Xu, Lisa Wu Wills, Hongce Zhang, Zhiyao Xie

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023