Siavash Rezaei

According to our database1, Siavash Rezaei authored at least 15 papers between 2014 and 2021.

Collaborative distances:



In proceedings 
PhD thesis 




Unobtrusive Pain Monitoring in Older Adults With Dementia Using Pairwise and Contrastive Training.
IEEE J. Biomed. Health Informatics, 2021

In-storage Processing of I/O Intensive Applications on Computational Storage Drives.
CoRR, 2021

Cost-effective, Energy-efficient, and Scalable Storage Computing for Large-scale AI Applications.
ACM Trans. Storage, 2020

STANNIS: Low-Power Acceleration of Deep Neural Network Training Using Computational Storage.
CoRR, 2020

Ambient Pain Monitoring in Older Adults with Dementia to Improve Pain Management in Long-Term Care Facilities.
Proceedings of the Companion Publication of the 2020 International Conference on Multimodal Interaction, 2020

HyperTune: Dynamic Hyperparameter Tuning for Efficient Distribution of DNN Training Over Heterogeneous Systems.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Stannis: Low-Power Acceleration of DNN Training Using Computational Storage Devices.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

Computational storage: an efficient and scalable platform for big data and HPC applications.
J. Big Data, 2019

UltraShare: FPGA-based Dynamic Accelerator Sharing and Allocation.
Proceedings of the 2019 International Conference on ReConFigurable Computing and FPGAs, 2019

Catalina: In-Storage Processing Acceleration for Scalable Big Data Analytics.
Proceedings of the 27th Euromicro International Conference on Parallel, 2019

Accelerating HPC Applications Using Computational Storage Devices.
Proceedings of the 21st IEEE International Conference on High Performance Computing and Communications; 17th IEEE International Conference on Smart City; 5th IEEE International Conference on Data Science and Systems, 2019

CompStor: An In-storage Computation Platform for Scalable Distributed Processing.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

Scalable Multi-Queue Data Transfer Scheme for FPGA-Based Multi-Accelerators.
Proceedings of the 36th IEEE International Conference on Computer Design, 2018

Data-rate-aware FPGA-based acceleration framework for streaming applications.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016

Soft error estimation and mitigation of digital circuits by characterizing input patterns of logic gates.
Microelectron. Reliab., 2014