Slaheddine Aridhi

According to our database1, Slaheddine Aridhi authored at least 15 papers between 2008 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2016
On Memory Reuse Between Inputs and Outputs of Dataflow Actors.
ACM Trans. Embed. Comput. Syst., 2016

Distributed Memory Allocation Technique for Synchronous Dataflow Graphs.
Proceedings of the 2016 IEEE International Workshop on Signal Processing Systems, 2016

2015
Memory Analysis and Optimized Allocation of Dataflow Applications on Shared-Memory MPSoCs - In-Depth Study of a Computer Vision Application.
J. Signal Process. Syst., 2015

Buffer merging technique for minimizing memory footprints of Synchronous Dataflow specifications.
Proceedings of the 2015 IEEE International Conference on Acoustics, 2015

2014
Just-in-time scheduling techniques for multicore signal processing systems.
Proceedings of the 2014 IEEE Global Conference on Signal and Information Processing, 2014

Demonstrating a dataflow-based RTOS for heterogeneous MPSoC by means of a stereo matching application.
Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014

2013
Physical Layer Multi-Core Prototyping - A Dataflow-Based Approach for LTE eNodeB
Lecture Notes in Electrical Engineering 171, Springer, ISBN: 978-1-4471-4209-6, 2013

PiMM: Parameterized and Interfaced dataflow Meta-Model for MPSoCs runtime reconfiguration.
Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013

Applying the adaptive Hybrid Flow-Shop scheduling method to schedule a 3GPP LTE physical layer algorithm onto many-core digital signal processors.
Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems, 2013

2012
Memory bounds for the distributed execution of a hierarchical Synchronous Data-Flow graph.
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

2011
Building a RTOS for MPSoC dataflow programming.
Proceedings of the 2011 International Symposium on System on Chip, 2011

2010
Adaptive multicore scheduling for the LTE uplink.
Proceedings of the 2010 NASA/ESA Conference on Adaptive Hardware and Systems, 2010

2009
An Open Framework for Rapid Prototyping of Signal Processing Applications.
EURASIP J. Embed. Syst., 2009

Scalable compile-time scheduler for multi-core architectures.
Proceedings of the Design, Automation and Test in Europe, 2009

2008
Optimization of automatically generated multi-core code for the LTE RACH-PD algorithm
CoRR, 2008


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