Soujanna Sarkar

According to our database, Soujanna Sarkar authored at least 5 papers between 2002 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2009

Lessons and Experiences with High-Level Synthesis.

Soujanna Sarkar, Shashank Dabral, Praveen Tiwari, Raj S. Mitra

IEEE Des. Test Comput., 2009

2005

Effective IP reuse for high quality SOC design.

Soujanna Sarkar, Subash Chandar G., Sanjay Shinde

Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

An Effective IP Reuse Methodology for Quality System-on-Chip Design.

Soujanna Sarkar, Sanjay Shinde, Subash Chandar G.

Proceedings of the 2005 International Symposium on System-on-Chip, 2005

An Effective Framework for Enabling the Reuse of External Soft IP.

Soujanna Sarkar, Subash Chandar G.

Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

2002

Challenges in the Design of a Scalable Data-Acquisition and Processing System-on-Silicon.

Karanth Shankaranarayana, Soujanna Sarkar, R. Venkatraman, Shyam S. Jagini, N. Venkatesh, Jagdish C. Rao, H. Udayakumar, M. Sambandam, K. P. Sheshadri, S. Talapatra, Parag Mhatre, Jais Abraham, Rubin A. Parekhji

Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002