Ramakrishnan Venkatraman
According to our database1,
Ramakrishnan Venkatraman
authored at least 21 papers
between 1994 and 2023.
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Bibliography
2023
Accurate Representation of Distribution System Dynamics in Bulk System Studies by Clusters of Composite Load Models.
Proceedings of the IEEE Industry Applications Society Annual Meeting, 2023
2018
Dynamic Co-Simulation Methods for Combined Transmission-Distribution System and Integration Time Step Impact on Convergence.
CoRR, 2018
2012
Proceedings of the 25th International Conference on VLSI Design, 2012
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012
2011
Proceedings of the VLSI Design 2011: 24th International Conference on VLSI Design, 2011
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011
2009
An Approach to Measure the Performance Impact of Dynamic Voltage Fluctuations Using Static Timing Analysis.
Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009
Optimisation Quality Assessment in Large, Complex SoC Designs Challenges and Solutions.
Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
Power & variability test chip architecture and 45nm-generation silicon-based analysis for robust, power-aware SoC design.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
2006
The Statistics of Device Variations and its Impact on SRAM Bitcell Performance, Leakage and Stability.
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006
2005
A Soft-Switched Full-Bridge Single-Stage AC-to-DC Converter With Low-Line-Current Harmonic Distortion.
IEEE Trans. Ind. Electron., 2005
A High-Performance SRAM Technology With Reduced Chip-Level Routing Congestion for SoC.
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005
2003
Design and Use of Memory-Specific Test Structures to Ensure SRAM Yield and Manufacturability.
Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003
2002
Challenges in the Design of a Scalable Data-Acquisition and Processing System-on-Silicon.
Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002
2000
IEEE Trans. Aerosp. Electron. Syst., 2000
Artif. Intell. Eng., 2000
Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, 2000
1994
Proceedings of the Eleventh Annual Washington Ada Symposium & summer ACM SIGAda Meeting on Ada, 1994