Soumen Mohapatra

Orcid: 0000-0002-7302-5562

According to our database1, Soumen Mohapatra authored at least 7 papers between 2021 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
A 14 GHz Integer-N Sub-Sampling PLL With RMS-Jitter of 85.4 fs Occupying an Ultra Low Area of 0.0918 mm<sup>2</sup>.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2024

7.9 An 8b 6-12GHz 0.18mW/GHz DC Modulated Ramp-Based Phase Interpolator in 65nm CMOS Process.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023
Low-Power Process and Temperature-Invariant Constant Slope-and-Swing Ramp-Based Phase Interpolator.
IEEE J. Solid State Circuits, 2023

Energy-Efficient ReRAM-Based ML Training via Mixed Pruning and Reconfigurable ADC.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023

2021
Fast Beam Training With True-Time-Delay Arrays in Wideband Millimeter-Wave Systems.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Wideband Beamforming with Rainbow Beam Training using Reconfigurable True-Time-Delay Arrays for Millimeter-Wave Wireless.
CoRR, 2021

A 4-Element 800MHz-BW 29mW True-Time-Delay Spatial Signal Processor Enabling Fast Beam-Training with Data Communications.
Proceedings of the 47th ESSCIRC 2021, 2021


  Loading...