Sreekumar V. Kodakara

According to our database, Sreekumar V. Kodakara authored at least 11 papers between 2005 and 2015.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2015

Extracting effective functional tests from commercial programs.

Sreekumar Vadakke Kodakara, Mehul V. Sagar, Joel Yuen

Proceedings of the 33rd IEEE VLSI Test Symposium, 2015

Special session 12B: Panel: IOT - Reliable? Secure? Or death by a billion cuts?

Sreekumar V. Kodakara, Suriya Natarajan

Proceedings of the 33rd IEEE VLSI Test Symposium, 2015

2008

MMV: A Metamodeling Based Microprocessor Validation Environment.

Deepak Mathaikutty, Sreekumar V. Kodakara, Ajit Dingankar, Sandeep K. Shukla, David J. Lilja

IEEE Trans. Very Large Scale Integr. Syst., 2008

2007

CIM: A Reliable Metric for Evaluating Program Phase Classifications.

Sreekumar V. Kodakara, Jinpyo Kim, David J. Lilja, Douglas M. Hawkins, Wei-Chung Hsu, Pen-Chung Yew

IEEE Comput. Archit. Lett., 2007

Model Based Test Generation for Microprocessor Architecture Validation.

Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Dingankar, Sandeep K. Shukla, David J. Lilja

Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

Analysis of Statistical Sampling in Microarchitecture Simulation: Metric, Methodology and Program Characterization.

Sreekumar V. Kodakara, Jinpyo Kim, David J. Lilja, Wei-Chung Hsu, Pen-Chung Yew

Proceedings of the IEEE 10th International Symposium on Workload Characterization, 2007

Design fault directed test generation for microprocessor validation.

Deepak Mathaikutty, Sandeep K. Shukla, Sreekumar V. Kodakara, David J. Lilja, Ajit Dingankar

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006

MMV: Metamodeling Based Microprocessor Valiation Environment.

Ajit Dingankar, Deepak Mathaikutty, Sreekumar V. Kodakara, Sandeep K. Shukla, David J. Lilja

Proceedings of the Eleventh Annual IEEE International High-Level Design Validation and Test Workshop 2006, 2006

Robust analytical gate delay modeling for low voltage circuits.

Anand Ramalingam, Sreekumar V. Kodakara, Anirudh Devgan, David Z. Pan

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005

Characterizing and Comparing Prevailing Simulation Techniques.

Joshua J. Yi, Sreekumar V. Kodakara, Resit Sendag, David J. Lilja, Douglas M. Hawkins

Proceedings of the 11th International Conference on High-Performance Computer Architecture (HPCA-11 2005), 2005

Dynamic Code Region (DCR) Based Program Phase Tracking and Prediction for Dynamic Optimizations.

Jinpyo Kim, Sreekumar V. Kodakara, Wei-Chung Hsu, David J. Lilja, Pen-Chung Yew

Proceedings of the High Performance Embedded Architectures and Compilers, 2005