Joshua J. Yi

IEEE Micro, 2024

Analysis of Historical Patenting Behavior and Patent Characteristics of Computer Architecture Companies - Part VIII: Patent Families.

[BibT_eX]

[DOI]

IEEE Micro, 2024

2023

Analysis of Historical Patenting Behavior and Patent Characteristics of Computer Architecture Companies - Part VII: Relationship Between Prosecution Time and Claims.

[BibT_eX]

[DOI]

IEEE Micro, 2023

Analysis of Historical Patenting Behavior and Patent Characteristics of Computer Architecture Companies - Part VI: Relationship Between Prosecution Time and Claims.

[BibT_eX]

[DOI]

IEEE Micro, 2023

Does Academic Research Drive Industrial Innovation in Computer Architecture? - Analyzing Citations to Academic Papers in Patents.

[BibT_eX]

[DOI]

IEEE Micro, 2023

2022

Analysis of Historical Patenting Behavior and Patent Characteristics of Computer Architecture Companies - Part V: References.

[BibT_eX]

[DOI]

IEEE Micro, 2022

Analysis of Historical Patenting Behavior and Patent Characteristics of Computer Architecture Companies - Part IV: Claims.

[BibT_eX]

[DOI]

IEEE Micro, 2022

Analysis of Historical Patenting Behavior and Patent Characteristics of Computer Architecture Companies - Part III: Claims.

[BibT_eX]

[DOI]

IEEE Micro, 2022

Review of Patents Issued to Computer Architecture Companies in 2021 - Part II.

[BibT_eX]

[DOI]

IEEE Micro, 2022

Review of Patents Issued to Computer Architecture Companies in 2021 [Micro Law].

[BibT_eX]

[DOI]

IEEE Micro, 2022

Analysis of Historical Patenting Behavior and Patent Characteristics of Computer Architecture Companies - Part II: Prosecution Time and Effective Patent Term Length.

[BibT_eX]

[DOI]

IEEE Micro, 2022

2021

Analysis of Historical Patenting Behavior and Patent Characteristics of Computer Architecture Companies.

[BibT_eX]

[DOI]

IEEE Micro, 2021

Microarchitecture Patents Over Time and Interesting Early Microarchitecture Patents.

[BibT_eX]

[DOI]

IEEE Micro, 2021

Recent Patents for Leading Computer Architecture Companies.

[BibT_eX]

[DOI]

IEEE Micro, 2021

2020

Informed Prefetching for Indirect Memory Accesses.

[BibT_eX]

[DOI]

Mustafa Cavus

ACM Trans. Archit. Code Optim., 2020

2018

Array Tracking Prefetcher for Indirect Accesses.

[BibT_eX]

[DOI]

Mustafa Cavus

Proceedings of the 36th IEEE International Conference on Computer Design, 2018

2017

FPGAs versus GPUs in Data centers.

[BibT_eX]

[DOI]

IEEE Micro, 2017

2016

Impact of Future Technologies on Architecture.

[BibT_eX]

[DOI]

IEEE Micro, 2016

Proprietary versus Open Instruction Sets.

[BibT_eX]

[DOI]

IEEE Micro, 2016

2010

The Future of Architectural Simulation.

[BibT_eX]

[DOI]

IEEE Micro, 2010

Programming Multicores: Do Applications Programmers Need to Write Explicitly Parallel Programs?

[BibT_eX]

[DOI]

IEEE Micro, 2010

2009

Adaptive simulation sampling using an Autoregressive framework.

[BibT_eX]

[DOI]

Sharookh Daruwalla

Proceedings of the 2009 International Conference on Embedded Computer Systems: Architectures, 2009

2008

Low power/area branch prediction using complementary branch predictors.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

2007

Speed versus Accuracy Trade-Offs in Microarchitectural Simulations.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2007

Low-Power Design and Temperature Management.

[BibT_eX]

[DOI]

IEEE Micro, 2007

Where Does Security Stand? New Vulnerabilities vs. Trusted Computing.

[BibT_eX]

[DOI]

IEEE Micro, 2007

Reliability: Fallacy or Reality?

[BibT_eX]

[DOI]

IEEE Micro, 2007

Single-Threaded vs. Multithreaded: Where Should We Focus?

[BibT_eX]

[DOI]

IEEE Micro, 2007

The impact of wrong-path memory references in cache-coherent multiprocessor systems.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 2007

Branch Misprediction Prediction: Complementary Branch Predictors.

[BibT_eX]

[DOI]

Peng-fei Chuang

IEEE Comput. Archit. Lett., 2007

2006

Simulation of Computer Architectures: Simulators, Benchmarks, Methodologies, and Recommendations.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2006

Guest Editors' Introduction: Computer Architecture Simulation and Modeling.

[BibT_eX]

[DOI]

Timothy Sherwood

IEEE Micro, 2006

The Future of Simulation: A Field of Dreams.

[BibT_eX]

[DOI]

Computer, 2006

Evaluating the efficacy of statistical simulation for design space exploration.

[BibT_eX]

[DOI]

Proceedings of the 2006 IEEE International Symposium on Performance Analysis of Systems and Software, 2006

Quantifying and reducing the effects of wrong-path memory references in cache-coherent multiprocessor systems.

[BibT_eX]

[DOI]

Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

Evaluating Benchmark Subsetting Approaches.

[BibT_eX]

[DOI]

Proceedings of the 2006 IEEE International Symposium on Workload Characterization, 2006

The exigency of benchmark and compiler drift: designing tomorrow's processors with yesterday's tools.

[BibT_eX]

[DOI]

Proceedings of the 20th Annual International Conference on Supercomputing, 2006

Computer Architecture.

[BibT_eX]

[DOI]

Proceedings of the Handbook of Nature-Inspired and Innovative Computing, 2006

2005

Improving Computer Architecture Simulation Methodology by Adding Statistical Rigor.

[BibT_eX]

[DOI]

Douglas M. Hawkins

IEEE Trans. Computers, 2005

Characterizing and Comparing Prevailing Simulation Techniques.

[BibT_eX]

[DOI]

Sreekumar V. Kodakara

Douglas M. Hawkins

Proceedings of the 11th International Conference on High-Performance Computer Architecture (HPCA-11 2005), 2005

2003

A Statistically Rigorous Approach for Improving Simulation Methodology.

[BibT_eX]

[DOI]

Douglas M. Hawkins

Proceedings of the Ninth International Symposium on High-Performance Computer Architecture (HPCA'03), 2003

2002

Improving Processor Performance by Simplifying and Bypassing Trivial Computations.

[BibT_eX]

[DOI]

Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002

Increasing Instruction-Level Parallelism with Instruction Precomputation (Research Note).

[BibT_eX]

[DOI]