Sri Hari Krishna Narayanan

According to our database1, Sri Hari Krishna Narayanan authored at least 27 papers between 2005 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
Automatic Differentiation for Adjoint Stencil Loops.
Proceedings of the 48th International Conference on Parallel Processing, 2019

2018
Efficient computation of derivatives for solving optimization problems in R and Python using SWIG-generated interfaces to ADOL-C.
Optimization Methods and Software, 2018

Verifying Properties of Differentiable Programs.
Proceedings of the Static Analysis - 25th International Symposium, 2018

Vectorised Computation of Diverging Ensembles.
Proceedings of the 47th International Conference on Parallel Processing, 2018

2015
A Mixed Approach to Adjoint Computation with Algorithmic Differentiation.
Proceedings of the System Modeling and Optimization - 27th IFIP TC 7 Conference, CSMO 2015, 2015

2014
Performance of automatic differentiation tools in the dynamic simulation of multibody systems.
Adv. Eng. Softw., 2014

2013
Exascale workload characterization and architecture implications.
Proceedings of the 2013 Spring Simulation Multiconference, SpringSim '13, 2013

2012
Poster: An Exascale Workload Study.
Proceedings of the 2012 SC Companion: High Performance Computing, 2012

Abstract: An Exascale Workload Study.
Proceedings of the 2012 SC Companion: High Performance Computing, 2012

2011
Sparse Jacobian Computation Using ADIC2 and ColPack.
Proceedings of the International Conference on Computational Science, 2011

2010
ADIC2: Development of a component source transformation system for differentiating C and C++.
Proceedings of the International Conference on Computational Science, 2010

Compiler directed network-on-chip reliability enhancement for chip multiprocessors.
Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, 2010

Generating Performance Bounds from Source Code.
Proceedings of the 39th International Conference on Parallel Processing, 2010

2009
Optimizing shared cache behavior of chip multiprocessors.
Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009

In-Network Caching for Chip Multiprocessors.
Proceedings of the High Performance Embedded Architectures and Compilers, 2009

Process variation aware thread mapping for Chip Multiprocessors.
Proceedings of the Design, Automation and Test in Europe, 2009

Slicing based code parallelization for minimizing inter-processor communication.
Proceedings of the 2009 International Conference on Compilers, 2009

2008
A Scratch-Pad Memory Aware Dynamic Loop Scheduling Algorithm.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

A Systematic Approach to Automatically Generate Multiple Semantically Equivalent Program Versions.
Proceedings of the Reliable Software Technologies, 2008

2007
Securing Disk-Resident Data through Application Level Encryption.
Proceedings of the Fourth International IEEE Security in Storage Workshop, 2007

Performance aware secure code partitioning.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
Compiler-Directed Power Density Reduction in NoC-Based Multi-Core Designs.
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006

Minimizing energy consumption of banked memories using data recomputation.
Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006

Secure Execution of Computations in Untrusted Hosts.
Proceedings of the Reliable Software Technologies, 2006

2005
Workload Clustering for Increasing Energy Savings on Embedded MPSoCs.
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

Temperature-Sensitive Loop Parallelization for Chip Multiprocessors.
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

Using loop invariants to fight soft errors in data caches.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005


  Loading...