Feihui Li

Affiliations:
  • Penn State, University Park, USA


According to our database1, Feihui Li authored at least 39 papers between 2004 and 2009.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2009
Compiler-assisted soft error detection under performance and energy constraints in embedded systems.
ACM Trans. Embed. Comput. Syst., 2009

2008
Implementation and evaluation of a migration-based NUCA design for chip multiprocessors.
Proceedings of the 2008 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, 2008

A novel migration-based NUCA design for chip multiprocessors.
Proceedings of the ACM/IEEE Conference on High Performance Computing, 2008

Ring data location prediction scheme for Non-Uniform Cache Architectures.
Proceedings of the 26th International Conference on Computer Design, 2008

Application mapping for chip multiprocessors.
Proceedings of the 45th Design Automation Conference, 2008

2007
Locality-Aware Distributed Loop Scheduling for Chip Multiprocessors.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

A Process Scheduler-Based Approach to NoC Power Management.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

Profile-driven energy reduction in network-on-chips.
Proceedings of the ACM SIGPLAN 2007 Conference on Programming Language Design and Implementation, 2007

Compiler-directed application mapping for NoC based chip multiprocessors.
Proceedings of the 2007 ACM SIGPLAN/SIGBED Conference on Languages, 2007

Reducing Energy Consumption of On-Chip Networks Through a Hybrid Compiler-Runtime Approach.
Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007

Ring Prediction for Non-Uniform Cache Architectures.
Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007

2006
Compiler-directed channel allocation for saving power in on-chip networks.
Proceedings of the 33rd ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, 2006

Reducing NoC energy consumption through compiler-directed channel voltage scaling.
Proceedings of the ACM SIGPLAN 2006 Conference on Programming Language Design and Implementation, 2006

Compiler-directed thermal management for VLIW functional units.
Proceedings of the 2006 ACM SIGPLAN/SIGBED Conference on Languages, 2006

Exploiting Software Pipelining for Network-on-Chip architectures.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

Leakage-Aware SPM Management.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

Compiler-Directed Management of Leakage Power in Software-Managed Memories.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

Design and Management of 3D Chip Multiprocessors Using Network-in-Memory.
Proceedings of the 33rd International Symposium on Computer Architecture (ISCA 2006), 2006

Dynamic partitioning of processing and memory resources in embedded MPSoC architectures.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Activity clustering for leakage management in SPMs.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Reducing dynamic compilation overhead by overlapping compilation and execution.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

Energy savings through embedded processing on disk system.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

Maximizing data reuse for minimizing memory space requirements and execution cycles.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

Prefetching-aware cache line turnoff for saving leakage energy.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

Energy-aware computation duplication for improving reliability in embedded chip multiprocessors.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005
Increasing Data TLB Resilience to Transient Errors.
Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005

Improving scratch-pad memory reliability through compiler-guided data block duplication.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Compiler-directed voltage scaling on communication links for reducing power consumption.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Exploiting last idle periods of links for network power management.
Proceedings of the EMSOFT 2005, 2005

Studying Storage-Recomputation Tradeoffs in Memory-Constrained Embedded Processing.
Proceedings of the 2005 Design, 2005

Compiler-Directed Instruction Duplication for Soft Error Detection.
Proceedings of the 2005 Design, 2005

Locality-conscious workload assignment for array-based computations in MPSOC architectures.
Proceedings of the 42nd Design Automation Conference, 2005

A Compiler-Based Approach to Data Security.
Proceedings of the Compiler Construction, 14th International Conference, 2005

Compiler-directed proactive power management for networks.
Proceedings of the 2005 International Conference on Compilers, 2005

Using loop invariants to fight soft errors in data caches.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

Using data replication to reduce communication energy on chip multiprocessors.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

Increasing FPGA resilience against soft errors using task duplication.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004
Improving Performance of Java Applications Using a Coprocessor.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

Improving Memory Performance of Embedded Java Applications by Dynamic Layout Modifications.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004


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