Subhrashankha Ghosh

According to our database, Subhrashankha Ghosh authored at least 2 papers between 2010 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2011

XDL-Based Module Generators for Rapid FPGA Design Implementation.

Subhrashankha Ghosh, Brent E. Nelson

Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

2010

Using Hard Macros to Reduce FPGA Compilation Time.

Christopher Lavin, Marc Padilla, Subhrashankha Ghosh, Brent E. Nelson, Brad L. Hutchings, Michael J. Wirthlin

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010