Sumanth Gudaparthi

According to our database, Sumanth Gudaparthi authored at least 5 papers between 2017 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

Selective register-file cache: an energy saving technique for embedded processor architecture.

Sumanth Gudaparthi, Rahul Shrestha

Des. Autom. Embed. Syst., 2022

CANDLES: Channel-Aware Novel Dataflow-Microarchitecture Co-Design for Low Energy Sparse Neural Network Acceleration.

Sumanth Gudaparthi, Sarabjeet Singh, Surya Narayanan, Rajeev Balasubramonian, Visvesh Sathe

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

2019

Wire-Aware Architecture and Dataflow for CNN Accelerators.

Sumanth Gudaparthi, Surya Narayanan, Rajeev Balasubramonian, Edouard Giacomin, Hari Kambalasubramanyam, Pierre-Emmanuel Gaillardon

Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

2018

Moving CNN Accelerator Computations Closer to Data.

Sumanth Gudaparthi, Surya Narayanan, Rajeev Balasubramonian

Proceedings of the 1st Workshop on Energy Efficient Machine Learning and Cognitive Computing for Embedded Applications, 2018

2017

Energy-Efficient VLSI Architecture & Implementation of Bi-modal Multi-banked Register-File Organization.

Sumanth Gudaparthi, Rahul Shrestha

Proceedings of the VLSI Design and Test - 21st International Symposium, 2017