Sundaram Ananthanarayanan

According to our database1, Sundaram Ananthanarayanan authored at least 7 papers between 2012 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2016

2014
Reliable Computing with Ultra-Reduced Instruction Set Coprocessors.
IEEE Micro, 2014

2013
Low cost permanent fault detection using ultra-reduced instruction set co-processors.
Proceedings of the Design, Automation and Test in Europe, 2013

2012
Analysis and evaluation of greedy thread swapping based dynamic power management for MPSoC platforms.
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

EmPower: FPGA based rapid prototyping of dynamic power management algorithms for multi-processor systems on chip.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

EmPower: FPGA based emulation of dynamic power management algorithms for multi-core systems on chip (abstract only).
Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

Reliable computing with ultra-reduced instruction set co-processors.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012


  Loading...