Sunghye Park

Orcid: 0000-0002-1932-0763

According to our database1, Sunghye Park authored at least 7 papers between 2019 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Hybrid Circuit Mapping: Leveraging the Full Spectrum of Computational Capabilities of Neutral Atom Quantum Computers.
CoRR, 2023

ClusterNet: Routing Congestion Prediction and Optimization Using Netlist Clustering and Graph Neural Networks.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

2022
MCQA: Multi-Constraint Qubit Allocation for Near-FTQC Device.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

A fast and scalable qubit-mapping method for noisy intermediate-scale quantum computers.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2020
A Logic Synthesis Methodology for Low-Power Ternary Logic Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

2019
Multi-Threshold Voltages Graphene Barristor-Based Ternary ALU.
Proceedings of the 2019 International SoC Design Conference, 2019

Design of Quad-Edge-Triggered Sequential Logic Circuits for Ternary Logic.
Proceedings of the 2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL), 2019


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