Taehwan Oh

According to our database1, Taehwan Oh authored at least 10 papers between 2011 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2020
Enhancing Quality of Corpus Annotation: Construction of the Multi-Layer Corpus Annotation and Simplified Validation of the Corpus Annotation.
Proceedings of the 34th Pacific Asia Conference on Language, Information and Computation, 2020

2014
A Time-Based Pipelined ADC Using Both Voltage and Time Domain Information.
IEEE J. Solid State Circuits, 2014

A 48 fJ/CS, 74 dB SNDR, 87 dB SFDR, 85 dB THD, 30 MS/s pipelined ADC using hybrid dynamic amplifier.
Proceedings of the Symposium on VLSI Circuits, 2014

2013
Parallel gain enhancement technique for switched-capacitor circuits.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012
A 5MHz BW 70.7dB SNDR noise-shaped two-step quantizer based ΔΣ ADC.
Proceedings of the Symposium on VLSI Circuits, 2012

A 71dB dynamic range third-order ΔΣ TDC using charge-pump.
Proceedings of the Symposium on VLSI Circuits, 2012

Class A+ amplifier with controlled positive feedback for discrete-time signal processing circuits.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Correlated jitter sampling for jitter cancellation in pipelined TDC.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Enhanced SAR ADC energy efficiency from the early reset merged capacitor switching algorithm.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011
Analysis of Residue Integration Sampling With Improved Jitter Immunity.
IEEE Trans. Circuits Syst. II Express Briefs, 2011


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