Terence B. Hook

According to our database, Terence B. Hook authored at least 7 papers between 1992 and 2012.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2012

Fully depleted devices for designers: FDSOI and FinFETs.

Terence B. Hook

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2005

Negative bias temperature instability on three oxide thicknesses (1.4/2.2/5.2 nm) with nitridation variations and deuteration.

Terence B. Hook, Ronald J. Bolam, William Clark, Jay S. Burnham, Nivo Rovedo, Laura Schutz

Microelectron. Reliab., 2005

2003

Ultralow-power SRAM technology.

Randy W. Mann, W. W. (Bill) Abadeer, Matthew J. Breitwisch, O. Bula, Jeff S. Brown, Bryant C. Colwill, Peter E. Cottrell, William T. Crocco Jr., Stephen S. Furkay, Michael J. Hauser, Terence B. Hook, Dennis Hoyniak, James M. Johnson, Chung Hon Lam, Rebecca D. Mih, J. Rivard, Atsushi Moriwaki, E. Phipps, Christopher S. Putnam, BethAnn Rainey, James J. Toomey, Mohammad Imran Younus

IBM J. Res. Dev., 2003

2001

Plasma process-induced damage on thick (6.8 nm) and thin (3.5 nm) gate oxide: parametric shifts, hot-carrier response, and dielectric integrity degradation.

Terence B. Hook, David Harmon, Chuan Lin

Microelectron. Reliab., 2001

Enchanced multi-threshold (MTCMOS) circuits using variable well bias.

Stephen V. Kosonocky, Michael Immediato, Peter E. Cottrell, Terence B. Hook, Randy W. Mann, Jeff Brown

Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001

1999

Nitrided gate oxides for 3.3-V logic application: Reliability and device design considerations.

Terence B. Hook, Jay S. Burnham, Ronald J. Bolam

IBM J. Res. Dev., 1999

1992

Automatic extraction of circuit models from layout artwork for a BiCMOS technology.

Terence B. Hook

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992