Theo Kluter

According to our database1, Theo Kluter authored at least 13 papers between 2008 and 2014.

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Bibliography

2014
Way Stealing: A Unified Data Cache and Architecturally Visible Storage for Instruction Set Extensions.
IEEE Trans. Very Large Scale Integr. Syst., 2014

Virtual Ways: Low-Cost Coherence for Instruction Set Extensions with Architecturally Visible Storage.
ACM Trans. Archit. Code Optim., 2014

2012
Optically-Clocked Instruction Set Extensions for High Efficiency Embedded Processors.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

Counting stream registers: An efficient and effective snoop filter architecture.
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

2010
Virtual Ways: Efficient Coherence for Architecturally Visible Storage in Automatic Instruction Set Extensions.
Proceedings of the High Performance Embedded Architectures and Compilers, 2010

2009
Single-Photon Synchronous Detection.
IEEE J. Solid State Circuits, 2009

Introducing control-flow inclusion to support pipelining in custom instruction set extensions.
Proceedings of the IEEE 7th Symposium on Application Specific Processors, 2009

MPSoC Design Using Application-Specific Architecturally Visible Communication.
Proceedings of the High Performance Embedded Architectures and Compilers, 2009

Way Stealing: cache-assisted automatic instruction set extensions.
Proceedings of the 46th Design Automation Conference, 2009

A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2009

2008
A 128 × 128 Single-Photon Image Sensor With Column-Level 10-Bit Time-to-Digital Converter Array.
IEEE J. Solid State Circuits, 2008

A 128×128 Single-Photon Imager with on-Chip Column-Level 10b Time-to-Digital Converter Array Capable of 97ps Resolution.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

Speculative DMA for architecturally visible storage in instruction set extensions.
Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, 2008


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