Thomas P. Kelliher

Proceedings of the 44st Annual Southeast Regional Conference, 2006

2005

An Analysis of Iterative Deformable Solid Object Modeling.

[BibT_eX]

Shrirang M. Yardi

Proceedings of The 2005 International Conference on Modeling, 2005

2003

Specialized hardware for deformable object modeling.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. Video Technol., 2003

2000

The design of the MGAP-2: a micro-grained massively parallel array.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2000

Hardware/Software Co-design for Real-Time Physical Modeling.

[BibT_eX]

[DOI]

Proceedings of the 2000 IEEE International Conference on Multimedia and Expo, 2000

SPARTA: Simulation of Physics on a Real-Time Architecture.

[BibT_eX]

[DOI]

Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, 2000

1999

Aggressive Dynamic Execution of Decoded Traces.

[BibT_eX]

[DOI]

J. VLSI Signal Process., 1999

The Design of a Register Renaming Unit.

[BibT_eX]

[DOI]

Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999

1997

The MGAP Family of Processor Arrays.

[BibT_eX]

[DOI]

Proceedings of the 7th Great Lakes Symposium on VLSI (GLS-VLSI '97), 1997

1996

Simultaneous speech segmentation and phoneme recognition using dynamic programming.

[BibT_eX]

[DOI]

Raminder Singh Bajwa

Robert Michael Owens

Proceedings of the 1996 IEEE International Conference on Acoustics, 1996

1995

The MGAP-2: an advanced, massively parallel VLSI signal processor.

[BibT_eX]

[DOI]

Proceedings of the 1995 International Conference on Acoustics, 1995

1993

The design and implementation of the Arithmetic Cube II, a VLSI signal processing system.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 1993

A systolic VLSI architecture for multi-dimensional transforms.

[BibT_eX]

[DOI]