Tim Baldauf

According to our database, Tim Baldauf authored at least 4 papers between 2016 and 2018.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2018

A wired-AND transistor: Polarity controllable FET with multiple inputs.

Maik Simon, Jens Trommer, Boshen Liang, D. Fischer, Tim Baldauf, Muhammad Bilal Khan, Andre Heinzig, M. Knaut, Yordan M. Georgiev, Artur Erbe, J. W. Bartha, Thomas Mikolajick, Walter M. Weber

Proceedings of the 76th Device Research Conference, 2018

A physical synthesis flow for early technology evaluation of silicon nanowire based reconfigurable FETs.

Shubham Rai, Ansh Rupani, Dennis Walter, Michael Raitza, Andre Heinzig, Tim Baldauf, Jens Trommer, Christian Mayr, Walter M. Weber, Akash Kumar

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

In-depth electrical characterization of carrier transport in ambipolar Si-NW Schottky-barrier FETs.

Dae-Young Jeon, Tim Baldauf, So Jeong Park, Sebastian Pregl, Larysa Baraban, Gianaurelio Cuniberti, Thomas Mikolajick, Walter M. Weber

Proceedings of the 47th European Solid-State Device Research Conference, 2017

2016

Reconfigurable nanowire transistors with multiple independent gates for efficient and programmable combinational circuits.

Jens Trommer, Andre Heinzig, Tim Baldauf, Thomas Mikolajick, Walter M. Weber, Michael Raitza, Marcus Völp

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016