Marcus Völp

According to our database1, Marcus Völp authored at least 45 papers between 2000 and 2018.

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Bibliography

2018
A Hardware/Software Stack for Heterogeneous Systems.
IEEE Trans. Multi-Scale Computing Systems, 2018

Accurate filtering of privacy-sensitive information in raw genomic data.
Journal of Biomedical Informatics, 2018

Towards Real-Time-Aware Intrusion Tolerance.
Proceedings of the 37th IEEE Symposium on Reliable Distributed Systems, 2018

Improving Security for Time-Triggered Real-Time Systems with Task Replication.
Proceedings of the 24th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2018

Intrusion-Tolerant Autonomous Driving.
Proceedings of the 21st IEEE International Symposium on Real-Time Distributed Computing, 2018

Velisarios: Byzantine Fault-Tolerant Protocols Powered by Coq.
Proceedings of the Programming Languages and Systems, 2018

Vulnerability Analysis and Mitigation of Directed Timing Inference Based Attacks on Time-Triggered Systems.
Proceedings of the 30th Euromicro Conference on Real-Time Systems, 2018

2017
Permanent Reencryption: How to Survive Generations of Cryptanalysts to Come.
Proceedings of the Security Protocols XXV, 2017

Permanent Reencryption: How to Survive Generations of Cryptanalysts to Come (Transcript of Discussion).
Proceedings of the Security Protocols XXV, 2017

Enclave-Based Privacy-Preserving Alignment of Raw Genomic Information: Information Leakage and Countermeasures.
Proceedings of the 2nd Workshop on System Software for Trusted Execution, SysTEX@SOSP 2017, 2017

A Perspective of Security for Mobile Service Robots.
Proceedings of the ROBOT 2017: Third Iberian Robotics Conference, 2017

Meeting the Challenges of Critical and Extreme Dependability and Security.
Proceedings of the 22nd IEEE Pacific Rim International Symposium on Dependable Computing, 2017

Exploiting transistor-level reconfiguration to optimize combinational circuits.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Formally verified differential dynamic logic.
Proceedings of the 6th ACM SIGPLAN Conference on Certified Programs and Proofs, 2017

2016
Avoiding Leakage and Synchronization Attacks through Enclave-Side Preemption Control.
Proceedings of the 1st Workshop on System Software for Trusted Execution, 2016

Reconfigurable nanowire transistors with multiple independent gates for efficient and programmable combinational circuits.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Towards Safe and Secure Autonomous and Cooperative Vehicle Ecosystems.
Proceedings of the 2nd ACM Workshop on Cyber-Physical Systems Security and Privacy, 2016

M3: A Hardware/Operating-System Co-Design to Tame Heterogeneous Manycores.
Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems, 2016

2015
Locks: Picking key methods for a scalable quantitative analysis.
J. Comput. Syst. Sci., 2015

Demo abstract: Taming many heterogeneous cores.
Proceedings of the 21st IEEE Real-Time and Embedded Technology and Applications Symposium, 2015

Query processing on low-energy many-core processors.
Proceedings of the 31st IEEE International Conference on Data Engineering Workshops, 2015

Towards dependable CPS infrastructures: Architectural and operating-system challenges.
Proceedings of the 20th IEEE Conference on Emerging Technologies & Factory Automation, 2015

KeYmaera X: An Axiomatic Tactical Theorem Prover for Hybrid Systems.
Proceedings of the Automated Deduction - CADE-25, 2015

2014
Flat but trustworthy: security aspects in flattened hierarchical scheduling.
SIGBED Review, 2014

Towards Computation with Microchemomechanical Systems.
Int. J. Found. Comput. Sci., 2014

Has energy surpassed timeliness? Scheduling energy-constrained mixed-criticality systems.
Proceedings of the 20th IEEE Real-Time and Embedded Technology and Applications Symposium, 2014

Integrated circuits processing chemical information: Prospects and challenges.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013
The case for practical multi-resource and multi-level scheduling based on Energy/Utility.
Proceedings of the 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications, 2013

On confidentiality-preserving real-time locking protocols.
Proceedings of the 19th IEEE Real-Time and Embedded Technology and Applications Symposium, 2013

A Probabilistic Quantitative Analysis of Probabilistic-Write/Copy-Select.
Proceedings of the NASA Formal Methods, 2013

Elastic Manycores - How to Bring the OS Back into the Scheduling Game?
Proceedings of the Euro-Par 2013: Parallel Processing Workshops, 2013

eBond: energy saving in heterogeneous R.A.I.N.
Proceedings of the Fourth International Conference on Future Energy Systems, 2013

The Potential of Energy/Utility-Accrual Scheduling.
Proceedings of the 27th International Conference on Advanced Information Networking and Applications Workshops, 2013

2012
Measuring energy consumption for short code paths using RAPL.
SIGMETRICS Performance Evaluation Review, 2012

Chiefly Symmetric: Results on the Scalability of Probabilistic Model Checking for Operating-System Code
Proceedings of the Proceedings Seventh Conference on Systems Software Verification, 2012

On the Use of Underspecified Data-Type Semantics for Type Safety in Low-Level Code
Proceedings of the Proceedings Seventh Conference on Systems Software Verification, 2012

The IMData Approach to Accelerate Data Intensive Workloads.
Proceedings of the Facing the Multicore-Challenge, 2012

Waiting for Locks: How Long Does It Usually Take?
Proceedings of the Formal Methods for Industrial Critical Systems, 2012

Flattening hierarchical scheduling.
Proceedings of the 12th International Conference on Embedded Software, 2012

2010
Provable protection of confidential data in microkernel based systems.
PhD thesis, 2010

2009
Formal Memory Models for the Verification of Low-Level Operating-System Code.
J. Autom. Reasoning, 2009

2008
A Formal Model of Memory Peculiarities for the Verification of Low-Level Operating-System Code.
Electr. Notes Theor. Comput. Sci., 2008

Avoiding timing channels in fixed-priority schedulers.
Proceedings of the 2008 ACM Symposium on Information, Computer and Communications Security, 2008

Statically Checking Confidentiality of Shared Memory Programs with Dynamic Labels.
Proceedings of the The Third International Conference on Availability, 2008

2000
Preliminary thoughts on memory-bus scheduling.
Proceedings of the ACM SIGOPS European Workshop, Kolding, Denmark, September 17-20, 2000, 2000


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