Michael Raitza

According to our database, Michael Raitza authored at least 21 papers between 2012 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

A Secure-by-Design Hardware/Operating System as a Substrate for Trustworthy Computing.

Sebastian Haas, Christopher Dunkel, Friedrich Pauls, Mattis Hasler, Yogesh Verma, Nilanjana Das, Michael Raitza

IEEE Trans. Very Large Scale Integr. Syst., October, 2025

An Architectural Approach for the Secure Integration of Hardware Accelerators into a Trustworthy MPSoC Platform.

Sebastian Haas, Mattis Hasler, Friedrich Pauls, Christopher Dunkel, Yogesh Verma, Nilanjana Das, Michael Raitza

Proceedings of the 18th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2025

Secure AI Runtime System Based on the M3 Platform.

Mattis Hasler, Michael Raitza, Friedrich Pauls, Gerhard P. Fettweis

Proceedings of the 59th Asilomar Conference on Signals, 2025

2023

Formal Analysis of Camouflaged Reconfigurable Circuits.

Steffen Märcker, Michael Raitza, Shubham Rai, Giulio Galderisi, Thomas Mikolajick, Jens Trommer, Akash Kumar

Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

Tutorial: How to Use Model Checking to Analyze Circuits at the Transistor Level.

Michael Raitza, Steffen Märcker

Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2023

2022

Exploring Standard-Cell Designs for Reconfigurable Nanotechnologies: A Formal Approach.

Michael Raitza, Steffen Märcker, Shubham Rai, Akash Kumar

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021

END-TRUE: Emerging Nanotechnology-Based Double-Throughput True Random Number Generator.

Shubham Rai, Nishant Gupta, Abhiroop Bhattacharjee, Ansh Rupani, Michael Raitza, Jens Trommer, Thomas Mikolajick, Akash Kumar

Proceedings of the VLSI-SoC: Technology Advancement on SoC Design, 2021

Metastability with Emerging Reconfigurable Transistors: Exploiting Ambipolarity for Throughput.

Abhiroop Bhattacharjee, Shubham Rai, Ansh Rupani, Michael Raitza, Akash Kumar

Proceedings of the 29th IFIP/IEEE International Conference on Very Large Scale Integration, 2021

AMAH-Flex: A Modular and Highly Flexible Tool for Generating Relocatable Systems on FPGAs.

Najdet Charaf, Christoph Tietz, Michael Raitza, Akash Kumar, Diana Göhringer

Proceedings of the International Conference on Field-Programmable Technology, 2021

2020

Quantitative Characterization of Reconfigurable Transistor Logic Gates.

Michael Raitza, Steffen Märcker, Jens Trommer, Andre Heinzig, Sascha Klüppelholz, Christel Baier, Akash Kumar

IEEE Access, 2020

DiSCERN: Distilling Standard-Cells for Emerging Reconfigurable Nanotechnologies.

Shubham Rai, Michael Raitza, Siva Satyendra Sahoo, Akash Kumar

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019

Designing Efficient Circuits Based on Runtime-Reconfigurable Field-Effect Transistors.

Shubham Rai, Jens Trommer, Michael Raitza, Thomas Mikolajick, Walter M. Weber, Akash Kumar

IEEE Trans. Very Large Scale Integr. Syst., 2019

2018

A Hardware/Software Stack for Heterogeneous Systems.

Jerónimo Castrillón, Matthias Lieber, Sascha Klüppelholz, Marcus Völp, Nils Asmussen, Uwe Aßmann, Franz Baader, Christel Baier, Gerhard P. Fettweis, Jochen Fröhlich, Andrés Goens, Sebastian Haas, Dirk Habich, Hermann Härtig, Mattis Hasler, Immo Huismann, Tomas Karnagel, Sven Karol, Akash Kumar, Wolfgang Lehner, Linda Leuschner, Siqi Ling, Steffen Märcker, Christian Menard, Johannes Mey, Wolfgang E. Nagel, Benedikt Nöthen, Rafael Peñaloza, Michael Raitza, Jörg Stiller, Annett Ungethüm, Axel Voigt, Sascha Wunderlich

IEEE Trans. Multi Scale Comput. Syst., 2018

A physical synthesis flow for early technology evaluation of silicon nanowire based reconfigurable FETs.

Shubham Rai, Ansh Rupani, Dennis Walter, Michael Raitza, Andre Heinzig, Tim Baldauf, Jens Trommer, Christian Mayr, Walter M. Weber, Akash Kumar

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Technology mapping flow for emerging reconfigurable silicon nanowire transistors.

Shubham Rai, Michael Raitza, Akash Kumar

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

Exploiting transistor-level reconfiguration to optimize combinational circuits.

Michael Raitza, Akash Kumar, Marcus Völp, Dennis Walter, Jens Trommer, Thomas Mikolajick, Walter M. Weber

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016

RAW 2014: Random Number Generators on FPGAs.

Michael Raitza, Markus Vogt, Christian Hochberger, Thilo Pionteck

ACM Trans. Reconfigurable Technol. Syst., 2016

Reconfigurable nanowire transistors with multiple independent gates for efficient and programmable combinational circuits.

Jens Trommer, Andre Heinzig, Tim Baldauf, Thomas Mikolajick, Walter M. Weber, Michael Raitza, Marcus Völp

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2014

Influence of Magnetic Fields and X-Radiation on Ring Oscillators in FPGAs.

Michael Raitza, Markus Vogt, Christian Hochberger, Thilo Pionteck

Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

2012

Influence of operating conditions on ring oscillator-based entropy sources in FPGAs.

Christian Hochberger, Changgong Li, Michael Raitza, Markus Vogt

Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

Towards GCC-based automatic soft-core customization.

Gerald Hempel, Christian Hochberger, Michael Raitza

Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012