Tobias Schneider
Orcid: 0000-0002-6849-5949Affiliations:
- NXP Semiconductors, Austria
- Université catholique de Louvain, Belgium (former)
- Ruhr University Bochum, Germany (former)
According to our database1,
Tobias Schneider
authored at least 36 papers
between 2013 and 2024.
Collaborative distances:
Collaborative distances:
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Online presence:
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on uclouvain.be
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on orcid.org
On csauthors.net:
Bibliography
2024
Cyber Resilience for the Internet of Things: Implementations With Resilience Engines and Attack Classifications.
IEEE Trans. Emerg. Top. Comput., 2024
2023
Protecting Dilithium against Leakage Revisited Sensitivity Analysis and Improved Implementations.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2023
From MLWE to RLWE: A Differential Fault Attack on Randomized & Deterministic Dilithium.
IACR Cryptol. ePrint Arch., 2023
Exploiting Small-Norm Polynomial Multiplication with Physical Attacks: Application to CRYSTALS-Dilithium.
IACR Cryptol. ePrint Arch., 2023
2022
Post-Quantum Authenticated Encryption against Chosen-Ciphertext Side-Channel Attacks.
IACR Cryptol. ePrint Arch., 2022
Leveling Dilithium against Leakage: Revisited Sensitivity Analysis and Improved Implementations.
IACR Cryptol. ePrint Arch., 2022
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2022
2021
J. Cryptogr. Eng., 2021
IACR Cryptol. ePrint Arch., 2021
Proceedings of the IEEE International Conference on Cyber Security and Resilience, 2021
Proceedings of the Cryptology and Network Security - 20th International Conference, 2021
2020
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2020
2019
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2019
Proceedings of the Public-Key Cryptography - PKC 2019, 2019
2018
Glitch-Resistant Masking Revisited - or Why Proofs in the Robust Probing Model are Needed.
IACR Cryptol. ePrint Arch., 2018
2017
J. Cryptogr. Eng., 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2017, 2017
Proceedings of the Advances in Cryptology - ASIACRYPT 2017, 2017
2016
IACR Cryptol. ePrint Arch., 2016
Bridging the Gap: Advanced Tools for Side-Channel Leakage Estimation Beyond Gaussian Templates and Histograms.
Proceedings of the Selected Areas in Cryptography - SAC 2016, 2016
ParTI - Towards Combined Hardware Countermeasures Against Side-Channel and Fault-Injection Attacks.
Proceedings of the Advances in Cryptology - CRYPTO 2016, 2016
Robust and One-Pass Parallel Computation of Correlation-Based Attacks at Arbitrary Order.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2016
Improved Side-Channel Analysis Attacks on Xilinx Bitstream Encryption of 5, 6, and 7 Series.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2016
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2016, 2016
ParTI: Towards Combined Hardware Countermeasures against Side-Channeland Fault-Injection Attacks.
Proceedings of the ACM Workshop on Theory of Implementation Security, 2016
Side-Channel Analysis Protection and Low-Latency in Action - - Case Study of PRINCE and Midori -.
Proceedings of the Advances in Cryptology - ASIACRYPT 2016, 2016
2015
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2015, 2015
Arithmetic Addition over Boolean Masking - Towards First- and Second-Order Resistance in Hardware.
Proceedings of the Applied Cryptography and Network Security, 2015
2014
Cryptographic Algorithms on the GA144 Asynchronous Multi-Core Processor - Implementation and Side-Channel Analysis.
J. Signal Process. Syst., 2014
2013
Efficient implementation of cryptographic primitives on the GA144 multi-core architecture.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013