Tomoaki Kawamura

According to our database1, Tomoaki Kawamura authored at least 6 papers between 2006 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2018
Flow Cache Cleansing with FPGA Hash Pipe for Highly Stabilized Software Data Plane.
Proceedings of the IEEE 19th International Conference on High Performance Switching and Routing, 2018

2014
A novel DBA scheme for TDM-PON based mobile fronthaul.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2014

2011
A 22-Gb/s and over-33-mega-frame/s throughput bridge-function unit in a low-latency OLT LSI for the coexistence of 10G-EPON and GE-PON.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

2008
A 10-Gb/s Burst-Mode Clock-and-Data Recovery IC with Frequency-Adjusting Dual Gated VCOs.
IEICE Trans. Electron., 2008

A 1ps-Resolution 2ns-Span 10Gb/s Data-Timing Generator with Spectrum Conversion.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2006
A 10Gb/s burst-mode adaptive gain select limiting amplifier in 0.13µm CMOS.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006


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