Akihiko Miyazaki

According to our database, Akihiko Miyazaki authored at least 8 papers between 2011 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2018

Flow Cache Cleansing with FPGA Hash Pipe for Highly Stabilized Software Data Plane.

Koji Yamazaki, Yuta Ukon, Shuhei Yoshida, Saki Hatta, Yusuke Sekihara, Shoko Ohteru, Tomoaki Kawamura, Takahiro Hatano, Koyo Nitta, Akihiko Miyazaki

Proceedings of the IEEE 19th International Conference on High Performance Switching and Routing, 2018

2016

Hash-table and balanced-tree based FIB architecture for CCN routers.

Kenta Shimazaki, Takashi Aoki, Takahiro Hatano, Takuya Otsuka, Akihiko Miyazaki, Toshitaka Tsuda, Nozomu Togawa

Proceedings of the International SoC Design Conference, 2016

2015

Software-Hardware-Cooperative Protocol Processor for Extendable 10G-EPON MAC Chip.

Naoki Miura, Akihiko Miyazaki, Junichi Kato, Nobuyuki Tanaka, Satoshi Shigematsu, Masami Urano, Mamoru Nakanishi, Tsugumichi Shibata

IEICE Trans. Electron., 2015

Lagopus FPGA - A reprogrammable data plane for high-performance software SDN switches.

Koji Yamazaki, Yoshihiro Nakajima, Takahiro Hatano, Akihiko Miyazaki

Proceedings of the 2015 IEEE Hot Chips 27 Symposium (HCS), 2015

An FPGA-Based Accelerator for the 2D Implicit FDM and Its Application to Heat Conduction Simulations (Abstract Only).

Yutaro Ishigaki, Ning Li, Yoichi Tomioka, Akihiko Miyazaki, Hitoshi Kitazawa

Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

2014

Accelerating SDN/NFV with Transparent Offloading Architecture.

Koji Yamazaki, Takeshi Osaka, Sadayuki Yasuda, Shoko Ohteru, Akihiko Miyazaki

Proceedings of the Open Networking Summit 2014 - Research Track, 2014

2012

Extendable point-to-multi-point protocol processor for 10G-EPON MAC SoCs.

Naoki Miura, Akihiko Miyazaki, Junichi Kato, Nobuyuki Tanaka, Masami Urano, Mamoru Nakanishi, Tsugumichi Shibata

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011

Energy-Efficient Frame-Buffer Architecture and It's Control Schemes for ONU Power Reduction.

Hiroyuki Uzawa, Kazuhiko Terada, Namiko Ikeda, Akihiko Miyazaki, Masami Urano, Tsugumichi Shibata

Proceedings of the Global Communications Conference, 2011