Masafumi Nogawa

According to our database1, Masafumi Nogawa authored at least 10 papers between 2006 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2017
25-Gb/s clock and data recovery IC using latch-load combined with CML buffer circuit for delay generation with 65-nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2015
A 25-Gb/s 480-mW CMOS modulator driver using area-efficient 3D inductor peaking.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

2014
20.1-mW 8-Gbps UWB-IR millimeter-wave transmitter using an OOK pulse modulator based on CMOS inverters.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
Small and Low-Cost Dual-Rate Optical Triplexer for OLT Transceivers in 10G/1G Co-existing 10G-EPON Systems.
IEICE Trans. Electron., 2013

Session 7 overview: Optical transceivers and silicon photonics.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

F3: Emerging technologies for wireline communication.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012
A 10Gb/s burst-mode laser diode driver for burst-by-burst power saving.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2008
A 10-Gb/s Burst-Mode Clock-and-Data Recovery IC with Frequency-Adjusting Dual Gated VCOs.
IEICE Trans. Electron., 2008

A PVT Tolerant STM-16 Clock-and-Data Recovery LSI Using an On-Chip Loop-Gain Variation Compensation Architecture in 0.20-µm CMOS/SOI.
IEICE Trans. Electron., 2008

2006
A 10Gb/s burst-mode adaptive gain select limiting amplifier in 0.13µm CMOS.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006


  Loading...