Vasileios Titopoulos

According to our database, Vasileios Titopoulos authored at least 10 papers between 2024 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

Vectorized FlashAttention with low-cost exponential computation in RISC-V vector processors.

Vasileios Titopoulos, Kosmas Alexandridis, Giorgos Dimitrakopoulos

J. Supercomput., March, 2026

2025

Optimizing Structured-Sparse Matrix Multiplication in RISC-V Vector Processors.

Vasileios Titopoulos, Kosmas Alexandridis, Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos

IEEE Trans. Computers, April, 2025

Custom Algorithm-based Fault Tolerance for Attention Layers in Transformers.

Vasileios Titopoulos, Kosmas Alexandridis, Giorgos Dimitrakopoulos

Proceedings of the 38th IEEE International System-on-Chip Conference, 2025

Efficient Implementation of RISC-V Vector Permutation Instructions.

Vasileios Titopoulos, George Alexakis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2025

Low-Cost FlashAttention with Fused Exponential and Multiplication Hardware Operators.

Kosmas Alexandridis, Vasileios Titopoulos, Giorgos Dimitrakopoulos

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2025

FLASH-D: FlashAttention with Hidden Softmax Division.

Kosmas Alexandridis, Vasileios Titopoulos, Giorgos Dimitrakopoulos

Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2025

Register Dispersion: Reducing the Footprint of the Vector Register File in Vector Engines of Low-Cost RISC-V CPUs.

Vasileios Titopoulos, George Alexakis, Kosmas Alexandridis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos

Proceedings of the 22nd ACM International Conference on Computing Frontiers, 2025

2024

DeMM: A Decoupled Matrix Multiplication Engine Supporting Relaxed Structured Sparsity.

Christodoulos Peltekis, Vasileios Titopoulos, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos

IEEE Comput. Archit. Lett., 2024

A High-Level Synthesis Library for Synthesizing Efficient and Functional-Safe CNN Dataflow Accelerators.

Dionysios Filippas, Christodoulos Peltekis, Vasileios Titopoulos, Ioannis Kansizoglou, Georgios Ch. Sirakoulis, Antonios Gasteratos, Giorgos Dimitrakopoulos

IEEE Access, 2024

IndexMAC: A Custom RISC-V Vector Instruction to Accelerate Structured-Sparse Matrix Multiplications.

Vasileios Titopoulos, Kosmas Alexandridis, Christodoulos Peltekis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024