Victor R. Gonzalez-Diaz

Orcid: 0000-0002-2931-8368

Affiliations:
  • Benemerita Universidad Autonoma de Puebla, Mexico
  • National Institute for Astrophysics Optics and Electronics, Puebla, Mexico (PhD 2009)


According to our database1, Victor R. Gonzalez-Diaz authored at least 35 papers between 2007 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2022
Dual-Band CPW Graphene Antenna for Smart Cities and IoT Applications.
Sensors, 2022

SPICE synthesis of a solar cell model with irradiance and temperature evaluation.
Int. J. Circuit Theory Appl., 2022

2021
On-Chip Fuzzy Logic Synthesis of a New Ischemic and Non-Ischemic Heartbeat Classifier.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

2020
Two New Asymmetric Boolean Chaos Oscillators with No Dependence on Incommensurate Time-Delays and Their Circuit Implementation.
Symmetry, 2020

A parallel auto-adaptive topology for integrated energy harvesting system.
Microelectron. J., 2020

A 65nm Continuous-Time Sigma-Delta Modulator With Limited OTA DC Gain Compensation.
IEEE Access, 2020

A Methodology for Practical Design and Optimization of Class-E DC-DC Resonant Converters.
IEEE Access, 2020

2019
Leader-Following Consensus and Formation Control of VTOL-UAVs with Event-Triggered Communications.
Sensors, 2019

A CMOS Frequency Doubler from the Analog Cosine Mapping Function.
Circuits Syst. Signal Process., 2019

A Behavioral Model for Solar Cells With Transient Irradiation and Temperature Assessment.
IEEE Access, 2019

CMOS design of the power and modulation stage for a light emitting capacitor (LEC).
Proceedings of the 16th International Conference on Electrical Engineering, 2019

Event-triggered leader-following consensus of UAVs carrying a suspended load.
Proceedings of the 5th International Conference on Event-Based Control, 2019

Mono-Bit Quantizer ΣΔ Direct-Up Transmitter for UWB Using Simulink RF Blockset.
Proceedings of the International Conference on Electronics, Communications and Computers, 2019

2018
Pipeline A/D Converter Design for 5G OFDM Communications Systems.
Proceedings of the 88th IEEE Vehicular Technology Conference, 2018

System-Level Behavioral Model of a 12-Bit 1.5-Bit Per Stage Pipelined ADC Based on Verilog<sup>®</sup>=-AMS.
Proceedings of the 15th International Conference on Synthesis, 2018

A Fully Integrated Fuzzy Logic Algorithm for Ischemic Heartbeat Classification.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

High-level design of a 2<sup>nd</sup> order DT-SDM via SIMSIDES and its FPAA implementation.
Proceedings of the International Conference on Electronics, Communications and Computers, 2018

2017
Behavioral Modeling of Chaos-Based Applications by Using Verilog-A.
Proceedings of the Fractional Order Control and Synchronization of Chaotic Systems, 2017

On the Electronic Realizations of Fractional-Order Phase-Lead-Lag Compensators with OpAmps and FPAAs.
Proceedings of the Fractional Order Control and Synchronization of Chaotic Systems, 2017

2016
Continuos Time ΣΔ modulator with efficient gain compensated integrators.
Microelectron. J., 2016

Improving linearity in MOS varactor based VCOs by means of the output quiescent bias point.
Integr., 2016

2015
Improving GBW product on CMOS operational transconductance amplifiers by interleaved feedforward paths.
Microelectron. J., 2015

Energy harvesting combining three different sources for low power applications.
Proceedings of the 12th International Conference on Electrical Engineering, 2015

New approximation for cosine wave mapping function to transistor level circuit.
Proceedings of the 25. International Conference on Electronics, 2015

2014
Attitude Stabilization of a Quadrotor by Means of Event-Triggered Nonlinear Control.
J. Intell. Robotic Syst., 2014

2013
Compact implementation of a three stages feedforward operational transconductance amplifier with Miller compensation.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013

Design constraints for low distortion OTA's in on-chip analog front-ends.
Proceedings of the 23rd International Conference on Electronics, 2013

2012
Fractional Frequency Synthesizers With Low Order Time-Variant Digital Sigma-Delta Modulator.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

2011
A Pseudorandom Number Generator Based on Time-Variant Recursion of Accumulators.
IEEE Trans. Circuits Syst. II Express Briefs, 2011

Use of time variant digital sigma-delta for fractional frequency synthesizers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010
Efficient Dithering in MASH Sigma-Delta Modulators for Fractional Frequency Synthesizers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

Double-sampling analog-look-ahead second order ΣΔ modulator with reduced dynamics.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Pseudorandom sequence generation for mismatch analog compensation of ADCs.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

2008
Accurate models for Frequency Synthesizers.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2007
Optimal dithered digital sigma-delta modulators for fractional-N frequency synthesizers.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007


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