Vijay Khawshe

According to our database, Vijay Khawshe authored at least 3 papers between 2007 and 2010.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2010

High Speed Clock and Data Recovery Circuit with Novel Jitter Reduction Technique.

Kunal Desai, Rajasekhar Nagulapalli, Vijay Krishna, Rajkumar Palwai, Pravin Kumar Venkatesan, Vijay Khawshe

Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010

2009

A 2.4Gbps-4.8Gbps XDR-DRAM I/O (XIO) Link.

Vijay Khawshe, Kapil Vyas, Renu Rangnekar, Prateek Goyal, Vijay Krishna, Kashinath Prabhu, Pravin Kumar Venkatesan, Leneesh Raghavan, Rajkumar Palwai, M. Thrivikraman, Kunal Desai, Abhijit Abhyankar

Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009

2007

A 2.5Gbps Quad CMOS Transceiver Cell Using Regulated Supply Low Jitter PLL.

Vijay Khawshe, Pravin V. Kumar, Renu Rangnekar, Kapil Vyas, Kashi Prabu, Mahabaleshwara, Manish Jain, Navin K. Mishra, Abhijit Abhyankar

Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007