Pravin Kumar Venkatesan

According to our database1, Pravin Kumar Venkatesan authored at least 5 papers between 2009 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2014
A 6.4-Gb/s Near-Ground Single-Ended Transceiver for Dual-Rank DIMM Memory Interface Systems.
IEEE J. Solid State Circuits, 2014

2013
A 6.4Gb/s near-ground single-ended transceiver for dual-rank DIMM memory interface systems.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2010
High Speed Clock and Data Recovery Circuit with Novel Jitter Reduction Technique.
Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010

A 32mW 7.4Gb/s protocol-agile source-series-terminated transmitter in 45nm CMOS SOI.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2009
A 2.4Gbps-4.8Gbps XDR-DRAM I/O (XIO) Link.
Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009


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