Vinod Pangracious

According to our database, Vinod Pangracious authored at least 28 papers between 2009 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

Blockchain Based Energy Trade.

Vinod Pangracious

Proceedings of the ICDCN '22: 23rd International Conference on Distributed Computing and Networking, Delhi, AA, India, January 4, 2022

2018

3D-cool: Design and development of adaptive thermal-aware three-dimensional NoC-based multiprocessor chip.

Vinod Pangracious, Ranjitha Dash, Ashok Kumar Turuk

Proceedings of the 2018 IEEE Symposium in Low-Power and High-Speed Chips, 2018

2017

Performance analysis and optimization of cluster-based mesh FPGA architectures: design methodology and CAD tool support.

Sonda Chtourou, Zied Marrakchi, Emna Amouri, Vinod Pangracious, Mohamed Abid, Habib Mehrez

Turkish J. Electr. Eng. Comput. Sci., 2017

A review of feature extraction for EEG epileptic seizure detection and classification.

Larbi Boubchir, Boubaker Daachi, Vinod Pangracious

Proceedings of the 40th International Conference on Telecommunications and Signal Processing, 2017

Thermal Management in 3D Homogeneous NoC Systems Using Optimized Placement of Liquid Microchannels.

Ranjita Kumari Dash, Vinod Pangracious, José L. Risco-Martín, Ashok Kumar Turuk, Amartya Majumdar, José Luis Ayala

Proceedings of the 11th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2017

2016

Novel Three-Dimensional Embedded FPGA Technology and Achitecture.

Vinod Pangracious, Mulhim Al-Doori

SIGARCH Comput. Archit. News, 2016

Improvement of cluster-based Mesh FPGA architecture using novel hierarchical interconnect topology and long routing wires.

Sonda Chtourou, Zied Marrakchi, Emna Amouri, Vinod Pangracious, Mohamed Abid, Habib Mehrez

Microprocess. Microsystems, 2016

Exploration of Mesh-Based FPGA Architecture: Comparison of 2D and 3D Technologies in Terms of Power, Area and Performance.

Sonda Chtourou, Zied Marrakchi, Emna Amouri, Vinod Pangracious, Habib Mehrez, Mohamed Abid

Proceedings of the 24th Euromicro International Conference on Parallel, 2016

2015

Three-Dimensional Design Methodologies for Tree-based FPGA Architecture

Vinod Pangracious, Zied Marrakchi, Habib Mehrez

Lecture Notes in Electrical Engineering 350, Springer, ISBN: 978-3-319-19174-4, 2015

Design and Optimization of a Horizontally Partitioned, High-Speed, 3D Tree-Based FPGA.

Vinod Pangracious, Zied Marrakchi, Habib Mehrez

IEEE Micro, 2015

Mesh of Clusters FPGA Architectures: Exploration Methodology and Interconnect Optimization.

Sonda Chtourou, Zied Marrakchi, Vinod Pangracious, Emna Amouri, Habib Mehrez, Mohamed Abid

Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

2014

Architecture level optimization of 3-dimensional tree-based FPGA.

Vinod Pangracious, Emna Amouri, Zied Marrakchi, Habib Mehrez

Microelectron. J., 2014

On wiring delays reduction of tree-based FPGA using 3-D fabric.

Vinod Pangracious, Mohamed Sahbi Marrakchi, Habib Mehrez, Zied Marrakchi

Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

Exploration and optimization of heterogeneous interconnect fabric of 3D tree-based FPGA.

Vinod Pangracious, Zied Marrakchi, Nizar Beltaief, Habib Mehrez, Umer Farooq

Proceedings of the 9th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2014

Three-dimensional Mesh of Clusters: An alternative unified high performance interconnect architecture for 3D-FPGA implementation.

Sonda Chtourou, Mohamed Abid, Vinod Pangracious, Emna Amouri, Zied Marrakchi, Habib Mehrez

Proceedings of the 2014 International 3D Systems Integration Conference, 2014

2013

Exploration environment for 3D heterogeneous tree-based FPGA architectures (3D HT-FPGA).

Vinod Pangracious, Habib Mehrez, Nizar Beltaief, Zied Marrakchi, Umer Farooq

Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Designing 3D tree-based FPGA: Interconnect optimization and thermal analysis.

Vinod Pangracious, Habib Mehrez, Zied Marrakchi

Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013

TSV count minimization and thermal analysis for 3D Tree-based FPGA.

Vinod Pangracious, Habib Mehrez, Zied Marrakchi

Proceedings of 2013 International Conference on IC Design & Technology, 2013

Physical design exploration of 3D tree-based FPGA architecture.

Vinod Pangracious, Emna Amouri, Habib Mehrez, Zied Marrakchi

Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013

Design and optimization of heterogeneous tree-based FPGA using 3D technology.

Vinod Pangracious, Zied Marrakchi, Habib Mehrez

Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

High performance 3-dimensional heterogeneous tree-based FPGA architectures (HT-FPGA).

Vinod Pangracious, Habib Mehrez, Umer Farooq, Zied Marrakchi

Proceedings of the 10th FPGAworld Conference, 2013

Architecture level TSV count minimization methodology for 3D tree-based FPGA.

Vinod Pangracious, Habib Mehrez, Zied Marrakchi

Proceedings of the 2013 IEEE Symposium on Low-Power and High-Speed Chips, 2013

Performance Analysis and Optimization of High Density Tree-Based 3D Multilevel FPGA.

Vinod Pangracious, Zied Marrakchi, Emna Amouri, Habib Mehrez

Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2013

Designing a 3D tree-based FPGA: Optimization of butterfly programmable interconnect topology using 3D technology.

Vinod Pangracious, Habib Mehrez, Zied Marrakchi

Proceedings of the 2013 IEEE International 3D Systems Integration Conference (3DIC), 2013

2012

Thermal analysis & optimization of a 3 dimensional heterogeneous structure

Ramya Menon C., Vinod Pangracious

CoRR, 2012

A Novel Methodology for Thermal Aware Silicon Area Estimation for 2D & 3D MPSoCs

Ramya Menon C., Vinod Pangracious

CoRR, 2012

2011

A Novel Methodology for Thermal Analysis & 3-Dimensional Memory Integration

Annmol Cherian, Ajay Augustine, Jemy Jose, Vinod Pangracious

CoRR, 2011

2009

Through Silicon Via-Based Grid for Thermal Control in 3D Chips.

José L. Ayala, Arvind Sridhar, Vinod Pangracious, David Atienza, Yusuf Leblebici

Proceedings of the Nano-Net - 4th International ICST Conference, 2009