Vishesh Mishra
Orcid: 0000-0001-6867-4587
According to our database1,
Vishesh Mishra authored at least 26 papers
between 2020 and 2026.
Collaborative distances:
Collaborative distances:
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Bibliography
2026
Dual-Mode Rounding Algorithms and Hardware for Posit-Based DNN Training: The Future of Mixed Precision Frameworks.
ACM Trans. Embed. Comput. Syst., January, 2026
PowerShift: Leveraging Power-Aware Weight Approximations for Neural Network Acceleration.
Proceedings of the 39th International Conference on VLSI Design & 25th International Conference on Embedded Systems, 2026
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026
2025
SATGuard: SAT-driven Countermeasures for Protecting Approximate Circuits from Hardware Trojan.
ACM Trans. Embed. Comput. Syst., November, 2025
J. Syst. Archit., 2025
Breaking PCB-Chain: A Side Channel Assisted Attack on IoT-Friendly Blockchain Mining.
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2025
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2025
Dual-Mode Rounding Algorithms and Hardware for Posit-based DNN Training: The Future of Mixed Precision Frameworks.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2025
2024
J. Cryptogr. Eng., September, 2024
Security Implications of Approximation: A Study of Trojan Attacks on Approximate Adders and Multipliers.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024
Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2024
2023
ACM Trans. Embed. Comput. Syst., October, 2023
Proceedings of the 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, 2023
Novel, Configurable Approximate Floating-point Multipliers for Error-Resilient Applications.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023
Aiding to Multimedia Accelerators: A Hardware Design for Efficient Rounding of Binary Floating Point Numbers.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
IACR Cryptol. ePrint Arch., 2022
IEEE Access, 2022
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022
HPAM: An 8-bit High-Performance Approximate Multiplier Design for Error Resilient Applications.
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
ART-MAC: Approximate Rounding and Truncation based MAC Unit for Fault-Tolerant Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
MEGA-MAC: A Merged Accumulation based Approximate MAC Unit for Error Resilient Applications.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022
2021
Proceedings of the 94th IEEE Vehicular Technology Conference, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
2020
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020