Volodymyr Kratyuk

According to our database1, Volodymyr Kratyuk authored at least 7 papers between 2004 and 2009.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2009
A Digital PLL With a Stochastic Time-to-Digital Converter.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009

2008
A Sub-Picosecond Resolution 0.5-1.5 GHz Digital-to-Phase Converter.
IEEE J. Solid State Circuits, 2008

2007
A Design Procedure for All-Digital Phase-Locked Loops Based on a Charge-Pump Phase-Locked-Loop Analogy.
IEEE Trans. Circuits Syst. II Express Briefs, 2007

A 0.6GHz to 2GHz Digital PLL with Wide Tracking Range.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2005
Analysis of supply and ground noise sensitivity in ring and LC oscillators.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A low spur fractional-N frequency synthesizer architecture.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
Accurate simulation of phase noise in RF MEMS VCOs.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004


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