Wangjin Jiang

According to our database1, Wangjin Jiang authored at least 4 papers between 2024 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
FN2LD: FeFET-based nonvolatile and node-upset-recovery latch designs with cost optimization.
Microelectron. J., 2026

2025
Nonvolatile Double- and Triple-Node-Upset Tolerant Latch Designs Based on FeFET and CMOS.
IEEE Trans. Aerosp. Electron. Syst., December, 2025

NVSRLO: A FeFET-Based Non-Volatile and SEU-Recoverable Latch Design with Optimized Overhead.
Proceedings of the Design, Automation & Test in Europe Conference, 2025

2024
Efficient design approaches to CMOS full adder circuits.
Microelectron. J., 2024


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