Wataru Mizubayashi

Orcid: 0000-0003-3178-2087

According to our database1, Wataru Mizubayashi authored at least 9 papers between 2005 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2020
Analysis of charge-to-hot-carrier degradation in Ge pFinFETs.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

2015
PBTI for N-type tunnel FinFETs.
Proceedings of the 2015 International Conference on IC Design & Technology, 2015

2014
Improvement of epitaxial channel quality on heavily arsenic- and boron-doped Si surfaces and impact on tunnel FET performance.
Proceedings of the 44th European Solid State Device Research Conference, 2014

Variation behavior of tunnel-FETs originated from dopant concentration at source region and channel edge configuration.
Proceedings of the 44th European Solid State Device Research Conference, 2014

2013
Performance limit of parallel electric field tunnel FET and improvement by modified gate and channel configurations.
Proceedings of the European Solid-State Device Research Conference, 2013

Guidelines for symmetric threshold voltage in tunnel FinFETs with single and dual metal gate electrodes.
Proceedings of the European Solid-State Device Research Conference, 2013

2012
Two-step annealing effects on ultrathin EOT higher-k (k = 40) ALD-HfO2 gate stacks.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012

2005
Carrier separation analysis for clarifying carrier conduction and degradation mechanisms in high-k stack gate dielectrics.
Microelectron. Reliab., 2005

Electrical Characterization of Aluminum-Oxynitride Stacked Gate Dielectrics Prepared by a Layer-by-Layer Process of Chemical Vapor Deposition and Rapid Thermal Nitridation.
IEICE Trans. Electron., 2005


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