Wei Ye

Affiliations:
  • University of Texas at Austin, ECE Department, Austin, TX, USA


According to our database1, Wei Ye authored at least 11 papers between 2015 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
Multi-Scale High-Resolution Vision Transformer for Semantic Segmentation.
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2022

2020
TEMPO: Fast Mask Topography Effect Modeling with Deep Learning.
Proceedings of the ISPD 2020: International Symposium on Physical Design, Taipei, Taiwan, March 29, 2020

Re-examining VLSI Manufacturing and Yield through the Lens of Deep Learning : (Invited Talk).
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

2019
Litho-GPA: Gaussian Process Assurance for Lithography Hotspot Detection.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

LithoGAN: End-to-End Lithography Modeling with Generative Adversarial Networks.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

LithoROC: lithography hotspot detection with explicit ROC optimization.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

Tackling signal electromigration with learning-based detection and multistage mitigation.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2018
Machine Learning for Yield Learning and Optimization.
Proceedings of the IEEE International Test Conference, 2018

Power Grid Reduction by Sparse Convex Optimization.
Proceedings of the 2018 International Symposium on Physical Design, 2018

2017
Placement mitigation techniques for power grid electromigration.
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017

2015
Standard Cell Layout Regularity and Pin Access Optimization Considering Middle-of-Line.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015


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