Wei Zhang

Affiliations:
  • University of Minnesota, Minneapolis, MN, USA


According to our database1, Wei Zhang authored at least 8 papers between 2009 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

Online presence:

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Bibliography

2013
A Write-Back-Free 2T1D Embedded DRAM With Local Voltage Sensing and a Dual-Row-Access Low Power Mode.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

2012
An SRAM Reliability Test Macro for Fully Automated Statistical Measurements of V<sub>MIN</sub> Degradation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

A 2T1C Embedded DRAM Macro With No Boosted Supplies Featuring a 7T SRAM Based Repair and a Cell Storage Monitor.
IEEE J. Solid State Circuits, 2012

2011
An Array-Based Odometer System for Statistically Significant Circuit Aging Characterization.
IEEE J. Solid State Circuits, 2011

A 1V printed organic DRAM cell based on ion-gel gated transistors with a sub-10nW-per-cell Refresh Power.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

A 700MHz 2T1C embedded DRAM macro in a generic logic process with no boosted supplies.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010
Variation aware performance analysis of gain cell embedded DRAMs.
Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010

2009
An SRAM reliability test macro for fully-automated statistical measurements of Vmin degradation.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009


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