Winser E. Alexander

Affiliations:
  • North Carolina State University, Raleigh, USA


According to our database1, Winser E. Alexander authored at least 37 papers between 1984 and 2015.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2015
Acceleration of Synthetic Aperture Radar (SAR) Algorithms using Field Programmable Gate Arrays (FPGAs) (Abstract Only).
Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

2013
Hardware implementation of IIR digital filters for programmable devices.
Proceedings of the 20th IEEE International Conference on Electronics, 2013

2012
A Dataflow Framework for DSP Algorithm Refinement.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012

2011
Block Floating Point Interval ALU for Digital Signal Processing.
Reliab. Comput., 2011

2009
Automated Design Space Exploration for DSP Applications.
J. Signal Process. Syst., 2009

2008
An Implementation of a Biological Neural Model using Analog-Digital Integrated Circuits.
Proceedings of the 2008 IEEE International Behavioral Modeling and Simulation Workshop, 2008

2007
The Use of Interval Methods in Signal Processing and Control for Systems Biology.
Proceedings of the IEEE Symposium on Foundations of Computational Intelligence, 2007

2006
Automated Architectural Exploration for Signal Processing Algorithms.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2006

Pipelined ALU for Signal Processing to Implement Interval Arithmetic.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2006

Free Energy Analysis on the Coding Region of the Individual Genes of Saccharomyces cerevisiae.
Proceedings of the 28th International Conference of the IEEE Engineering in Medicine and Biology Society, 2006

2004
Medical image compression using post-segmentation approach.
Proceedings of the 2004 IEEE International Conference on Acoustics, 2004

2003
Dual clock rate block data parallel architecture.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
Region-based scalable coding for video communications.
Proceedings of the Visual Communications and Image Processing 2002, 2002

2001
Scalable image coding for interactive image communication over networks.
Proceedings of the Visual Communications and Image Processing 2001, 2001

2000
Parallel image processin gwith the block data paralel architecture.
IBM J. Res. Dev., 2000

1998
A mean field annealing approach to robust corner detection.
IEEE Trans. Syst. Man Cybern. Part B, 1998

An optimum solution for scale-invariant object recognition based on the multiresolution approximation.
Pattern Recognit., 1998

1996
Parallel image processing with the block data parallel architecture.
Proc. IEEE, 1996

Matrix Inversion on a Scalable Distributed Memory Parallel Architectur.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1996

Real-Time Implementation of the Kalman Filter Using the Block Data Parallel Architecture.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1996

1994
A Constrained Regularization Approach to Robust Corner Detection.
IEEE Trans. Syst. Man Cybern. Syst., 1994

A Programmable Simulator for Analyzing the Block Data Flow Architecture.
Proceedings of the MASCOTS '94, Proceedings of the Second International Workshop on Modeling, Analysis, and Simulation On Computer and Telecommunication Systems, January 31, 1994

Block Data Processing Using Commercial Processors.
Proceedings of the 1994 International Conference on Parallel Processing, 1994

1992
Fault Diagnosis in Analog Circuits Using Element Modulation.
IEEE Des. Test Comput., 1992

Curvature estimation and unique corner point detection for boundary representation.
Proceedings of the 1992 IEEE International Conference on Robotics and Automation, 1992

Adaptive state space filtering with FIR convergence behaviour.
Proceedings of the 1992 IEEE International Conference on Acoustics, 1992

Parallel inverse QR decomposition.
Proceedings of the 30th Annual Southeast Regional Conference, 1992

1991
Sampling error analysis in perfect reconstruction transmultiplexers.
Proceedings of the 1991 International Conference on Acoustics, 1991

1990
Mean square error analysis for the fast LMS-sine algorithm.
Proceedings of the 1990 International Conference on Acoustics, 1990

1989
Multiprocessor implementation of 2-D denominator-separable digital filters for real-time processing.
IEEE Trans. Acoust. Speech Signal Process., 1989

1988
A novel VLSI architecture for the real-time implementation of 2-D signal processing systems.
Proceedings of the Computer Design: VLSI in Computers and Processors, 1988

Stability analysis of the fast RLS adaptation algorithm.
Proceedings of the IEEE International Conference on Acoustics, 1988

Boundary value transient suppression for N-D digital systems.
Proceedings of the IEEE International Conference on Acoustics, 1988

1987
A Multiprocessor Architecture for Two-Dimensional Digital Filters.
IEEE Trans. Computers, 1987

Derivation and stability analysis of multidimensional IIR block digital filters.
Proceedings of the IEEE International Conference on Acoustics, 1987

1984
B-HIVE: a heterogeneous, interconnected, versatile and expandable multicomputer system.
SIGARCH Comput. Archit. News, 1984

Initial condition transient suppression for two dimensional recursive digital filters.
Proceedings of the IEEE International Conference on Acoustics, 1984


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