Wolfgang Spirkl

According to our database1, Wolfgang Spirkl authored at least 10 papers between 2006 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
An 8-Gb GDDR6X DRAM Achieving 22 Gb/s/pin With Single-Ended PAM-4 Signaling.
IEEE J. Solid State Circuits, 2022

2021

2018
An 8-Gb 12-Gb/s/pin GDDR5X DRAM for Cost-Effective High-Performance Applications.
IEEE J. Solid State Circuits, 2018

Session 12 overview: DRAM: Memory subcommittee.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017

2010
A 75 nm 7 Gb/s/pin 1 Gb GDDR5 Graphics Memory Device With Bandwidth Improvement Techniques.
IEEE J. Solid State Circuits, 2010

2009

2008
Efficient High-Speed Interface Verification and Fault Analysis.
Proceedings of the 2008 IEEE International Test Conference, 2008

2006
Fully automated semiconductor operating condition testing.
Proceedings of the 2006 IEEE International Test Conference, 2006

A 2Gb/s/pin 512Mb Graphics DRAM with NoiseReduction Techniques.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006


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