Xian Zhang

Orcid: 0000-0003-4875-2132

Affiliations:
  • Microsoft Research Asia, Beijing, China
  • Peking University, Beijing, China (PhD 2018)


According to our database1, Xian Zhang authored at least 22 papers between 2013 and 2025.

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Timeline

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Bibliography

2025
Development and validation of a machine-learning model for predicting prognosis in critically ill patients undergoing major surgery.
BMC Medical Informatics Decis. Mak., December, 2025

RepDL: Bit-level Reproducible Deep Learning Training and Inference.
CoRR, October, 2025

TrainVerify: Equivalence-Based Verification for Distributed LLM Training.
Proceedings of the ACM SIGOPS 31st Symposium on Operating Systems Principles, 2025

2022
Wireless Federated Learning With Dynamic Quantization and Bandwidth Adaptation.
IEEE Wirel. Commun. Lett., 2022

Decentralized Verifiable Mail-in Ballot Counting for Postal Voting.
CoRR, 2022

2021
Argus: A Fully Transparent Incentive System for Anti-Piracy Campaigns (Extended Version).
CoRR, 2021

Agatha: Smart Contract for DNN Computation.
CoRR, 2021

Argus: A Fully Transparent Incentive System for Anti-Piracy Campaigns.
Proceedings of the 40th International Symposium on Reliable Distributed Systems, 2021

Forerunner: Constraint-based Speculative Transaction Execution for Ethereum.
Proceedings of the SOSP '21: ACM SIGOPS 28th Symposium on Operating Systems Principles, 2021

PipeZK: Accelerating Zero-Knowledge Proof with a Pipelined Architecture.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

Characterizing Ethereum's Mining Power Decentralization at a Deeper Level.
Proceedings of the 40th IEEE Conference on Computer Communications, 2021

2020
Fork Path: Batching ORAM Requests to Remove Redundant Memory Accesses.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2018
Shadow Block: Accelerating ORAM Accesses with Data Duplication.
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

2017
Protect non-volatile memory from wear-out attack based on timing difference of row buffer hit/miss.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Toss-up Wear Leveling: Protecting Phase-Change Memories from Inconsistent Write Patterns.
Proceedings of the 54th Annual Design Automation Conference, 2017

2016
np-ECC: Nonadjacent position error correction code for racetrack memory.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2016

The Applications of NVM Technology in Hardware Security.
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

Pin Tumbler Lock: A shift based encryption mechanism for racetrack memory.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

A novel PUF based on cell error rate distribution of STT-RAM.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015
Fork path: improving efficiency of ORAM by removing redundant memory accesses.
Proceedings of the 48th International Symposium on Microarchitecture, 2015

Hi-fi playback: tolerating position errors in shift operations of racetrack memory.
Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015

2013
An efficient run-time encryption scheme for non-volatile main memory.
Proceedings of the International Conference on Compilers, 2013


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